I've realised there are many things I don't know about the synthesis process under Xilinx XST.
The top level of code is associated with a .ucf file, which defines pinout and timing constraints.
There's a wizard for timing constraints. It writes into the .ucf file.
What about sub-modules? The synthesis properties can be defined differently for each sub-module with an xcf file.
You can opt to use .xcf files under synthesis/properties/use synthesis constraint file
Is the timing constraint syntax the same in .xcf as in .ucf?
##### "Daddy, where do baby .xcf files come from?" ######
How do I enter a .xcf file? There's no obvious way to do it from the wizard; it writes .ucf files.
As there seems to be no wizard, must I write constraints into .xcf files manually?
Must I use a text editor and set the file type to .xcf?
When I synthesise the top level, the sub-modules will be synthesised according to the constraints in their .xcf files.
Is that correct?
I've looked at the XST User guide, but I'm still puzzled.
All comments gratefully received.
-- Mit der Dummheit kämpfen Götter selbst vergebens.