Den torsdag den 17. april 2014 18.22.56 UTC+2 skrev John Larkin:
I really don't understand why you say something like ISE is complicated
unless you are pushing the limit of performance and/or using every little detail of the build in features I think it is very straight forward
-Lasse
Den torsdag den 17. april 2014 20.49.39 UTC+2 skrev Phil Hobbs:
google acting up so I'll try again.
afaiu for 9500xl the keepers are always on, the inputs have pullups they can be turned on and off but only globally for all pins. No pulldowns
-Lasse
So I can leave out the external pull-ups?
(Once I get the dev tools working completely, I have a few Dangerous Prototypes XC9572 breakout boards I can measure, but I'm not that far along yet and I need to get the boards ordered.
For belt-and-suspenders purposes, I suppose that I'll put external pull-ups on this time, and measure for next time.
Thanks
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
yeh, I wouldn't bet on the internal pullups.
The datasheet is not real clear it only mentions that the unused IO have a 50K pullup, used IOs a 50K keeper
-Lasse
We use mostly Altera, because the tools are slightly less awful. We did one recent project with a Xilinx Zynq chip, FPGA plus two ARM cores. It took two guys over a week to get a C program to read and write one register in the fabric. Luckily, one of my ex-employees is an Altera FAE for Avnet, and he gave us extra help.
I could tell you horror stories about getting the Altera PCI Express stuff to work, but the horror isn't over yet. That wasn't weeks, it was lots of months.
-- John Larkin Highland Technology, Inc jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
^^^^^^
Oops, meant Xilinx.
-- John Larkin Highland Technology, Inc jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
Den torsdag den 17. april 2014 22.52.07 UTC+2 skrev John Larkin:
I'm in the middle of a Zynq project and I'll agree that Vivado and getting the PL part of a Zynq running has quite a learning curve
but cplds and old school fpgas with ISE is simple enough
-Lasse
"John Larkin" wrote in message news: snipped-for-privacy@4ax.com...
No? The MAX3000 series are still around, which are classical CMOS* CPLDs. Macrocells do the PLD thing, then there's a wad of those on the chip, with buses inbetween, and pins all around. Perfect for glue logic and simple counters. Even enough to build something moderately complicated, but you can burn through macrocells quickly.
*Though you might not think so given the quiescent supply current draw. I'm guessing the EEPROM cells are NMOS flavored or something. Not to mention the weird asymmetrical output pin drive strength. Better than the (even older, and I think still sort of available) MAX7K series though.Otherwise, Lattice parts are apparently very popular. Seems like every bit of test gear these days (scope, PSU, etc..) has one or several inside for general logic glue and fanout.
There's also a number of non-volatile (some static, some onboard self-configuring) FPGAs out there, in various sizes and prices. The main difference is, FPGAs emphasize flip-flops over combinatorials (usually having 4x4 LUTs as compared to a [C]PLD's 10 or 20 fan-in capacity).
Tim
-- Seven Transistor Labs Electrical Engineering Consultation Website: http://seventransistorlabs.com
Yes, there really isn't much difference between a "CPLD" and a small FPGA, anymore. Well, except price. ;-)
You really ought to take a look at the Lattice parts. They're have a really nice architecture. They also have a QFN-32 part that's really nice for simple stuff (256 cells). I'm looking seriously at it but they want $.75 for it. ;-)
The keeper/pullup/pulldown is a GLOBAL setting. It applies to every pin on the chip. (Maybe not true for outputs, but all inputs, at least! ***NOT*** just the UNUSED pins, but ALL INPUTS, too!) And, the "weak" keeper is NOT so weak, it has messed up all my analog stuff that worked fine on XC9500 (5V version). So, some reset switches and the crystal oscillator needed to have some resistors changed to much lower values.
If you want pullups for the DIP switches, then they will apply to all inputs on the chip.
Jon
A CPLD was (is?) based on the PAL/PEEL architecture, where logic is the sum of products of a whole lot of inputs, often every state available on the entire chip. The Altera CPLDs are actually small FPGAs, with small macrocells that only have a few (four?) inputs.
The sea-of-gates thing is better for stuff like adders. Adders are nasty in a sum-of-products architecture. True CPLDs are really anachronisms.
I think it was MMI who did the first CPLDs, like the bipolar PAL16V8, just a sum-of-products array with no flops. There was something before that, even; I think the Signetics PLAs were maybe the first programmable logic.
-- John Larkin Highland Technology Inc www.highlandtechnology.com jlarkin at highlandtechnology dot com Precision electronic instrumentation
Was. No more. With few exceptions, they're all mini-FPGAs, now. They may be missing features of the full-boat FPGAs (like clocked I/O cells) but they're almost all LUT based now.
If by that, you mean they don't exist, OK.
History lessons aren't extremely useful when comparing today's offerings. ;-)
People still sell 22CV10s. I actually designed one into a product about a year ago. We've used over 7000 of them in the last 5 years or so.
History is interesting to me. Scientists seem to have a lot of respect for their history, with retrospective papers and conferences and stuff. Engineers tend to be totally ignorant of the history of their own profession.
-- John Larkin Highland Technology, Inc jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
Not that this is a bad place to ask this question, but it isn't the first place I would think to ask about FPGA design (or even the second). Why didn't you ask in c.a.fpga? Just curious.
-- Rick
No particular reason, I just don't follow c.a.fpga.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
They don't fight each other over there; they're too busy fighting the tools.
-- John Larkin Highland Technology, Inc jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
We have been using the XC9536XL part (3.3V, VQ44) for about 6 years now and Xilinx is EOL'ing this entire line. Last buy in 2016 or
2017 I think it is... They cost around one dollar each. One thing I like and require of this part was to be able to run it in its slowed down mode for induced noise susceptability (it's in a power circuit).I have been looking for a suitable replacement but the ones that replace them (not pin compatible) require 1.8V as well as 3.3V. This board is pretty much out of room so it makes it hard to choose one. Looks like it might be easier to just use discreet logic again on a daughter board. This is kinda like seeing technology go backwards rather than forwards. I could replace more glue logic if the part had a few more macrocells and I can get twice as many in another part for slightly more money but it just seems backwards to me.
FPGAs would work but from what I hear, they are 10 times too expensive and 10 times too much logic to be a cost effective replacement. Can you even get them in 44 pin (or close) packages with FLASH instead of having to program them from the main micro all the time ?
I'd love some decent suggestions.
BTW, I didn't have any issues with the ISE pin allocation.
boB K7IQ
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Before the CPLDs were the PLDs PAL8H4 PAL4L8 etc.
?-)
Well, I fell back 10 yards and punted--it's working OK on Windows, anyway, and I actually programmed a CPLD with it, or so it claims. ;)
I'll give it a test run on Monday--gotta get back to tearing apart expensive home theatre systems and so on. Today I get to destroy a brand new PS4, among other things. ;)
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
By any chance, do you have a link to the EOL notice? We've just switched over a number of designs from the EOL 5VDC XC9536XL to the 3.3VDC versions. I'd hate to think we'll have to do another re-design.
Thanks.
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