Which university produces good analog EEs?

Maybe that's why there are no (cheap) ultralow brethren to the TLV431. If you want less than 10uA cathode current on the board level it either becomes very expensive, very large or you can forget about a reference.

--
Regards, Joerg

http://www.analogconsultants.com
Reply to
Joerg
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Hardly a week goes by that I don't design a micro-power BandGap into a chip ;-)

...Jim Thompson

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|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
|  Phoenix, Arizona            Voice:(480)460-2350  |             |
|  E-mail Address at Website     Fax:(480)460-2142  |  Brass Rat  |
|       http://www.analog-innovations.com           |    1962     |
             
         America: Land of the Free, Because of the Brave
Reply to
Jim Thompson

Dang, I just knew you'd say that ...

For us board level guys the situation looks pretty dire.

--
Regards, Joerg

http://www.analogconsultants.com
Reply to
Joerg

The Intersil references are amazing. They're a floating-capacitor EEPROM sort of cell connected to a fA follower opamp. They charge them up to the right voltage at the factory, then ship them. They are very stable and low noise for micro bits of power.

John

Reply to
John Larkin

But it's already there. Guys like Jim have tons of designs ready to go. All it would take is getting it into the market. AFAICT something like a

1uA cathode current version of a common ref chip would really take off in the marketplace, provided it's less than 10c in qties. It doesn't even need to be adjustable of have a large compliance range.
--
Regards, Joerg

http://www.analogconsultants.com
Reply to
Joerg

You can do a MOSIS run on old processes for a few $k. One day you should put all of the little circuits you have always wanted but can't buy onto one little chip, the "Joerg special". Design it into one of your products, making sure that you hook up all of the pins, and manufacture it in the shadiest overseas contract manufacturer that you can find. Pretty soon there will be exact copies coming out of 15 different fabs and we'll have an eternal supply.

Chris

Reply to
Chris Jones

The 10c part is the problem - the stock market analysts probably won't knowingly let a semiconductor company embark on a new product with less that 50% gross margin, and that sounds hard for 10c, tested etc. Anyway their marketing guys would get some big ideas and try to sell it for $1.50 then cancel it a couple of years later because nobody bought it. On the other hand, maybe there is a Chinese semi mfg who would be happy to accept a bit less margin.

Chris

Reply to
Chris Jones

It's must be much less than fA.

One day I want to get two of them and get one of them X-rayed a few times, to see if that affects the voltage. I guess it can't be too bad or they wouldn't be able to use them in anything that you would take to the airport.

Chris

Reply to
Chris Jones

Joerg snipped-for-privacy@removethispacbell.net posted to sci.electronics.design:

Once upon a time a school called Harvey Mudd did this well. Maybe they are still at it. I would consider U-Cal and Cal-State unlikely producers of even solid based trainables. The real resume as opposed to the normally prescribed one for getting through HR can really count. There are still a few non-degreed engineers as well.

Reply to
JosephKK

Micropower bandgaps show up in really mundane areas of chip design nowadays, such as POR. Really overkill, but because customers know it can be done, they expect it to be done. If you reverse engineer Maxim chips, you'll find a bandgap comparator circuit in the POR. Plenty of patents on such circuits, but never litigated to my knowledge. They do save power since the bandgap and comparator are folded into one circuit.

One of the trickier micropower circuits are those in thermal shutdown. That is where leakage can really kill you, so parasitics are required. However, it isn't exactly rocket science.

BTW, I forgot to mention it, but UCLA has a fair amount of analog design classes. Lastly, there is the Swiss Federal Institute of Technology (or close to that). They have all sorts of papers on dynamic biasing scheme, i.e. schemes to make micropower op amps slew quickly by boosting tail current, etc.

Reply to
miso

Eh, maybe they just wanted a trip to Silicon Valley. I was amazed at the number of MIT grads that had logic design on their resumes, but didn't know how to draw basic mos logic gates. It turns out they studied computer architecture with silicon compilation to get to the end product. That just doesn't fly on small mixed mode chips where the logic is implemented in rather coarse mos technology.

Reply to
miso

Yes, on chips this is no problem but no company has marketed those individually at a decent price. Meaning the sub-10uA references are usually not very suitable for mass production because you can't have a reference in there that costs more than all the rest of the board. So we have to use tricks such as pulsing and storing.

One reason why POR/BOR circuits contain precise references is that the chips they are on need it elsewhere as well. For example, a uC with an ADC on board. The often touted "cheat reference" consisting of four equal resistors hung onto the rail doesn't cut the mustard.

We didn't have much luck with UCLA so far. They didn't understand my module specs and couldn't even solder. Had to let them go. Europe would be an option but the immigration procedure is a real hassle. Plus there will be an expensive international move required unless you catch them right after their degree. Europe doesn't have such an extreme shortage of analog guys because larger companies there are often foolish. Some of them consider anyone over 40 a geezer that needs to be replaced by a kid. The consequences are very visible, for example with NXP's web site.

--
Regards, Joerg

http://www.analogconsultants.com
Reply to
Joerg

POR really should reflect what it takes to make the chip fly, not necessarily some arbitrary specification. That is, logic needs at least a VT, the worse case of N or P. So generally a chip POR will have a circuit that insures you at least have enough juice to turn on your worse case fet. Once you trust the logic (well, at least under static conditions), the next step is to insure the bandgap is awake, generally an output something above a VTN. Throw in a timer and hysteresis to make sure the supply rail hasn't sagged. Stuff like that. Thus POR is process and temperature dependent. However, as you probably know, that doesn't give the customer the warm and fuzzy feeling. They want to see something nice and snappy that can be verified with a DVM.

Reply to
miso

Oh yeah, the lack of soldering skills. That would require the student to have actually built something. These younguns just know how to program. You've seen the posts where a pic uP is the solutions to any task, not a state machine comprised of memory elements and combinational logic.

Reply to
miso

The customer won't even be able to hold a DVM to it if on-chip. What customers like me really want to see is a POR plus BOR where brown-outs are handled properly. Anything less than that is a risk. For some reason it usually takes the uC folks years to figure that out, no idea what they find so difficult about it.

--
Regards, Joerg

http://www.analogconsultants.com
Reply to
Joerg

There were elaborate uC solutions I found in my career that I have replaced with 20-30 cents worth of logic chips and some diodes. This "TV-dinner" behavior already started with the advent of PALs. Almost everyone was jumping on them (except me ...) and they were wasting lots of power. And money.

--
Regards, Joerg

http://www.analogconsultants.com
Reply to
Joerg

I worked in P'ok for 19 years. Great place to be *from*.

From there, we moved North 200 miles but looking to get out for somewhat warmer climes now (the instant the house sells). The Winters do suck and it looks like we'll be there one more. :-(

--
  Keith
Reply to
krw

for

do

do.

For the vast majority of applications, a uC is the right solution, certainly over the discrete implementation you suggest.

--
  Keith
Reply to
krw

Good luck selling, won't be easy these days :-(

A friend did that years ago and found Arkansas to be a good place. He said they don't tax you out of the house there. Unfortunately he had a fatal stroke a few years later.

--
Regards, Joerg

http://www.analogconsultants.com
Reply to
Joerg

Yeah, buyers are pretty slim. Amazingly the higher-end and the bottom stuff is selling. The stuff in the middle is sitting. We've had some interest, but they all have had something to sell too.

We're looking at KY, though if I find something (long term) that's interesting we'll go wherever. I'm kinda picky though. I've turned down some possibilities that didn't look all that great. I think I can afford to retire in KY, though I really don't want to. I'm doing a short-term contract in OH now just to keep from going insane (and help pay VT taxes). The work is fine but being away from home sucks.

I had a run-in with A-Fib early this year and am on medications that keep my BP rather low (half of what it was when I was in A-Fib and the sphygmomanometer tilted), so I hope I can escape a stroke. My brother had one a few years ago. He still has many resulting from it and can't talk well. His was likely caused by the doctors mucking with his heart though.

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  Keith
Reply to
krw

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