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Voltage to PWM chip (similar to class D)?

Den fredag den 30. maj 2014 19.18.22 UTC+2 skrev Joerg:

so clock it at 2MHz, I still think it'll be close

-Lasse

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Reply to
Lasse Langwadt Christensen
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Depending on who you ask, it's not "like" a sigma-delta -- it _is_ a sigma-delta. Just because _most_ sigma-delta converters use 1-bit D/A or A/D conversion doesn't mean they all do.

It's exactly what I was suggesting.

--

Tim Wescott 
Wescott Design Services 
http://www.wescottdesign.com
Reply to
Tim Wescott

What are you controlling that high-frequency noise matters so much? Nearly all the plants that I encounter are intrinsically low-pass.

If you're filtering to get the bulk of the PWM out, then much of the sigma-delta noise will be in the stopband of the filter, even if it's of lower frequency than the PWM. Particularly if the sigma-delta modulator uses a 2nd- or 3rd-order filter.

--

Tim Wescott 
Wescott Design Services 
http://www.wescottdesign.com
Reply to
Tim Wescott

Well... Why? You have analog in, and if you're driving your own final amp, PWM out. So you can difference the PWM and your analog command signal, feed that to an integrator of suitable gain, and drive the amplifier input with that plus your analog command signal.

It seems like a low component count slam-dunk to me, unless there's something that you're doing that is outside of my assumptions.

--

Tim Wescott 
Wescott Design Services 
http://www.wescottdesign.com
Reply to
Tim Wescott

exactly, sigma-delta is about getting from one resolution to another while shaping the quantization error towards higher frequencies

the reason for 1 bit is that then linearity comes for "free"

-Lasse

Reply to
Lasse Langwadt Christensen

If I may interject -- this is the sort of FPGA project that I'd sign up to doing, confident that I could make it work just fine. And keep in mind -- when I do HDL I get involved in conversations with folks like Rick that basically start out with "You're a software engineer, aren't you?" and go downhill from there.

This ain't rocket science!

--

Tim Wescott 
Wescott Design Services 
http://www.wescottdesign.com
Reply to
Tim Wescott

Please don't accuse me of being biased toward software people. I don't assume they are incapable of understanding something outside their field. I always wait for them to misunderstand something about hardware before I correct them. I know any number of software folks who are very capable of FPGA work just like I know hard core board level designers who can learn FGPA work as well.

In fact someone came to the FPGA group asking for help writing a "hello world" program in an FPGA. Several of us tried to explain how hard it would be to write HDL as if it were software to produce the program... he showed us wrong. We gave him a little help in the first steps of coding, but he got it up and working very quickly and went on to complete his project which was a technology demonstration.

He was appreciative of my help and tried to get his boss to approve a consulting contract for training, but they didn't want to spend the funds. Instead he talked them into sending me $500 for the pre-sales support I had given him for free. lol So I sent him a polo shirt.

BTW, I have always maintained that FPGA work is not rocket science. It is usually the software or board level designers who claim FPGA work is too hard unless you "really need" it. I say it is not hard to design, debug or maintain, just different in some ways. FPGAs are not used as often as useful because of the lack of good understanding of their true benefits and capabilities.

--

Rick
Reply to
rickman

I think you have the availability issue backwards. FPGA vendors have some of the longest lived products in the IC world. It is not at all uncommon to design in an FPGA when it is new and not get an EOL notice for well over 10 years. You were dealing with Intel who dabble in secondary business areas and then close up shop when they lose interest. I don't know that Intel has ever shipped a production FPGA so I would hardly call them an FPGA vendor in any sense of the word.

If you need a 20 year production life, what parts *can* you use? Does LTI give any assurance of a 20 year product life? What MCUs or DSPs are around after 20 years? Of these parts, I would be much less worried about FPGAs being around in 20 years although that is likely stretching it. If you need 30 years... I guess I don't know, I only been in the business for 40 years and don't expect to be around myself for another

30... in the large sense. ;)

BTW, there are several device families around with "true CMOS" power consumption. If you don't need 1 GHz there are FPGAs that are lower power than many ARM MCUs.

--

Rick
Reply to
rickman

That comment wasn't aimed at you -- I had a customer insist that I close a control loop in an FPGA instead of on a processor. I couldn't even talk them around to putting a MicroBlaze or whatever into their FPGA. When I got it working and it made its way to the in-house FPGA people, the first thing they said was "You're a software guy, aren't you?"

(It had some gawdawful 16-level multiplexer that I couldn't figure out how to break into smaller pieces or pipeline, which was by far the source of the most delay in the circuit, so it was a fair criticism).

--

Tim Wescott 
Wescott Design Services 
http://www.wescottdesign.com
Reply to
Tim Wescott

I think my comment made it sound like I was taking it personally. Written word vs. spoken. Sorry.

I think that is more an issue of experience. I'm no guru of FPGAs really. I have done my share of work with them and understand lots of issues like the one you had. But if you are trying to optimize things there are all sorts of tricks to use. Mostly it is better to *not* optimize, but to design cleanly. Optimization can be expensive and breaks easily.

Muxes in particular are one of the more awkward things to implement in an FPGA. There is no real way to optimize them unless there are missing pieces, for example a barrel shifter doesn't need the full N inputs to every output bit. I have also minimized them by using an adder as part of the mux. Most FPGAs have 4 input LUTs, a mux just has three inputs, so the fourth can be used as an output enable. Two muxes feeding an adder can have enables which allow the adder to be used as another mux. Or you can use four 2 input muxes with enables to feed a 4-lut which is just a 4-or gate. The trick is getting the tools to give you then when you are coding in an HDL, lol.

Otherwise muxes eat LUTs for breakfast, lunch and dinner. The best way to optimize them is to avoid them as much as possible.

--

Rick
Reply to
rickman

It can be done this way, although the output in the simulation isn't very clean around the min/max values of the drive signal.

[simulation file]

Just came back from a gnarly mountain bike ride. Got a blister on the right palm from all the handlebar wrestling. That's a pain when the computer mouse is on the right, ouch, ouch ...

--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

That's where I can continue talking. But the plant in this case is finicky and light, plus nasty resonances here and there.

Stopband is a pretty gradual thing when you can't go past 3rd order on the output filter. This application is sensitive to noise because the load is super fast.

--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

BTW, if you are ever in that position again, feel free to email me a question or two. I don't have to be on the clock for every little nit.

--

Rick
Reply to
rickman

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all deltasigmas have "issue" when you get very close to the rails, though I 'd think pwm also have a similar problem

I just threw that together to show deltasigma, I'd expect an AD7400 to perform better

I used to work with a guy that two mouses, one for each hand. He claimed it was very quick to get used to switching between them

-Lasse

Reply to
Lasse Langwadt Christensen

We also had it happen with a big medical system. Forgot which vendor but all they could offer was to pour it into a new (more expensive) FPGA series which would have meant a major relayout. So we poured it into our own ASIC instead and that has no EOL issue.

Tons. For example, I used CD4000 logic extensively. In the mid-90's a Fairchild engineer told me that would be a stupid decision, they'd go obsolete, I should use their single-package logic. Well, most of this is still in production. Then staples such as the LM324, those are here to stay. Also MMBT3904, BFS17, and so on. I just used a BFR92 on a new design. The first time I used one I was in the mid-80's and even then it wasn't exactly new.

LTC? Yes, pretty much. Before they call off anything they try to contact anyone who has ever bought it to see if it's ok.

8051. That's why this is one of my favorites.

Some of my designs have already celebrated their 20th in production and no end in sight.

That would be nice.

--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

The load is highly non-linear and very capacitive in behavior. So yeah, you could do a feedback thing with a separate lowpass to close the loop and call it good. But it may not be as good as going in with a clean PWM in the first place, adds a layer of risk that can (hopefully) be avoided.

Also, it's HV stuff so will be noisy as hell.

--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

Not really. For example, right now I have it running on the simulator with the LTC6992. Performs beautifully, very linear, but that chip has quite high tolerances in the modulation factor. I could compensate for that with demodulation plus a local loop and will probably do so if I don't find anything better. However, that adds a lot of parts.

I can use a mouse with either hand and before moving my office one room down the hallway had the mouse on the left. It drove my sister crazy when she was visiting. Now it's on the right and there is hardly space for it on the left. Oh well, it'll heal. Problem is, I want to do another much longer ride on the weekend.

--
Regards, Joerg 

http://www.analogconsultants.com/
Reply to
Joerg

Don't believe that for a moment! ASICs require a fab to be made. The only FPGA I have ever had go EOL was because the fab house was closing that fab line. FPGA makers don't build their own fabs like most chip makers these days. ASICs are made on the same lines. When the fab closes all the product either ends or goes to another fab which means they have to work the process which is more NRE.

I'm curious about your story. Yes, FPGAs go EOL, but like I said not remotely short lived. I would expect this design was either a long time in production or they picked an FPGA that was already long in the tooth.

Your example is CD4000 SSI/MSI logic? So why don't you build your current design with those parts? lol I mean a part that is a bit more complex. What MCUs have you used for 20 years other than the 8051? Many MCU parts go obsolete in 10 years if not shorter. I've seen DSP chips that lasted less than 5 years.

I read a thread the other day that mentioned a vendor who had a list of long life products they would commit to making for 10 years or so. I can't remember where it was. The vendor may have been Motorola.

Yes, well everyone does that... although it is not a question really. So if you tell LTI you are still using the part they will continue to make it for you without quadrupling the price?

Yes, I knew you would mention that one. But that is the *only* one and even then not all the parts are pin compatible.

So if you need some *real* processing capability, something that would be the equivalent of a *real* MCU or FPGA, what would you use? Unless they are making a 100 MHz 8051 I think you are pretty limited by that choice.

Yes, if you are using stuff like 2N2222 transistors, sure. But I am talking about something of similar complexity to an FPGA, DSP or modern MCU. Otherwise just keep using the stuff you have been using.

--

Rick
Reply to
rickman

The only things that i have seen that are even close were V to F converters. And they did DC to a few hundred Hz on the input spectrum. Maybe some audiophool Class D amplifier IC.

?-)

Reply to
josephkk

part

set

drives

V-.

Well you can band split it, a bit messier but it works. Put the crossover at about 30 Hz and do the LF yourself.

?-)

Reply to
josephkk

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