Voltage to PWM chip (similar to class D)?

If you are designed a product for multiple decades and expect to do some redesign every 10 years, you really need to be careful with the initial design. The product should be very modular with well defined (vendor independent) interfaces. If you need to redesign a module for whatever reason (availability/cost reduction), it should not be that hard to redesign a single module (card) without affecting the rest of the product.

If the product is also using some hierarchical structure with high and low level interfaces, in the next revision with high performance components to replace .g. a rack of cards with a single card, possibly also moving some HW functionality to SW. As long as the original rack level interface is implemented on the new, highly integrated card level module, things should be pretty easy to handle.

Companies come and go quite quickly, some become uncompetitive and go bankrupt, some are taken over by a hostile competitor.

There are political risks as seen in Eastern Europe and Asia in the last two decades. Also trade embargoes (such as CoCom) may limit into what countries you can sell your products, if you are using components originated from specific countries.

That would only be possible with silicon delay lines in there.

My experience with silicon delay lines is that they have a lot of phase noise. I've ripped several of them out and replaced them with controllable LC circuitry.

A ring oscillator could work although phase noise is often not so stellar either.

Anyhow, with so much effort and large CPU chips I might just do the analog thing.

With cutting edge I meant the latest and gratest (newest) from a major FPGA vendor. The usual, more gates, faster.

Lots of the logic chips have been around since my childhood days and no end in sight. For example, almost the whole CD4000 series which I gladly use in designs, for that very reason.

Many analog/mixed things do not need FPGA. They compete differently. Like a fast pulse-echo thing I just finished. It could be done in FPGA but it's all analog, in this case for cost reasons. It is hard to beat

I can get the accuracy alright. I am here because I couln't imagine there not being a class-D modulator with DC accuracy. But it seems there truly isn't one.

Huh? I have many clients who want exactly that. They want a product they ideally won't have to touch and can just keep selling. This is one of the reasons why products such as pellet stoves and other reidential and commercial gear use the 8051.

In many cases, yes, it is undesirable.

On trust. I have developed a trust level with that company over decades and (in contrast to some others) they have never disappointed.

Again, they call first and they won't discontinue if there is still a product line that uses the chip. I assume they'd expect reasonable quantities but that is generally the case with my designs. So it's not a question of re-starting an old IC, it is one of not stopping it in the first place.

We are right now doing a run of about 10,000 or so, depending on the yield. It's not that bad if you spread the cost over each resulting device.

Most ASICs I have been involved in run between 100,000 and a million parts per year which in the world of semiconductors is a drop in the bucket. They are all in the low single-digit Dollar range. Order gets called in, they make another round of wafers. Often they pre-make them and just dice them up after the order comes in. So you have to give them a reasonable forecast. It's almost like running a catering business.

That's true, which is why I'll probably do it analog this time around. When using 0402 sizes I can get it onto the real estate similar to a micro controller. I was hoping to make it smaller but it seems that's not in the cards.

Not quite. I can do it analog and with high precision. It's just that I was hoping there'd be a solution in a can, in the form of a li'l class D chip that happens to sport a good DC accuracy. That's why I am here, not because an analog solution won't work. More because a good analog solution consumes real estate but so does a processors with clock crystal and all.

That's where the bandwidth spec comes in, essentially 15kHz. So an audio chip would be very nice. But it seems there isn't one.

Unfortunately not in this case.

Yeah, and since it seems there isn't one I thing it'll be the old analog nose to the grindstone job again.

We had discussed that earlier in the thread and unfortunately it won't work. Has to be clean PWM.

That's similar to what I was going to do. But I wanted to avoid the extra parts for real estate reasons, hence my thread here inquiring for a fully integrated solution. Class D has super clean PWM but I (so far) don't know any that are DC-accurate.

What I meant is just a plain old feedback loop. Demodulate the PWM via a simple lowpass and us that as the error signal.

I know you like to roll your own, but what value do you assign to system design, board stuffing, checking for proper solder joints, on-board diagnostics, troubleshooting, repair, documentation, procurement, incoming inspection, etc.? It would seem a 3 cent transistor would end up costing much more, but the question is how much more? And how do you calculate it?

The whole issue probably belongs in the BOM Minimization thread:)

I don't know why you can't be specific about the vendor and part. I can't think of an example where one of the FPGA companies obsoleted a part any time within a 10 year time frame. I have a recollection of Xilinx dropping a package/part combo a bit earlier, but I'm not sure.

If you can go the ASIC route, then by all means do it. But FPGAs are usually used where ASICs are cost prohibitive because of the low volume.

I remember when some of the Xilinx reps would post in c.a.fpga about how the ASIC market would continue to shrink to nearly nothing because of the high mask costs. But they were not comparing apples to oranges... which they should have been. If you need today's technology in an FPGA you can do the design in a 4 year old ASIC at least.

Yes, we have already mentioned that. But you can't do much with SSI logic. It is *no* comparison to LSI and VLSI. It is silly to even talk about them in the same discussion.

Yes and you are here looking for a solution that you are finding difficult in analog.

You seem to be contradicting yourself. I don't follow.

Yes, you have clients... but how many chips? Until the number reaches millions per year no one cares and you are stuck with 8051s.

LOL, designing the 8051 into a pellet stove doesn't really mean a lot. If the volumes were higher, they could save money going to the Asian 4 bitters. They are using the 8051 because they barely need an MCU. If they need anything at all more complex they are stuck.

That means your needs have been compatible with their needs... so far.

I don't believe that for a minute. If you are the only customer left they will keep the part in production? Really? Have they actually told you that?

Now you are mixing apples and oranges again. ASICs are typically not full custom. Your custom ASIC is shared across many customers with a small number of custom layers. The ADI chips we were discussing are full custom parts and running a batch is a big deal. I am sure if you were the last customer for a part you would have to go pound sand.

Usually digital is already in a system, it is just a question of how much of it. That is another of the advantages. Once you open the digital jar, you can put a lot in there.

For 10+ year design, you really need to stay away from politically unstable countries like (in alphabetic order) China, Russia or USA,

When selecting components or subsystems, these big countries could block the availability of critical components due to political reasons, either directly or indirectly.

While smaller countries might have local political problems, they do not usually want loose the foreign trade, unless the society really disintegrates (e.g. Yugoslavia).

One remarkable CPU is the Motorola/Freescale MC68332. It's just now going out of production after at least 25 years.

Nice part--easy to use, powerful, lots of great peripherals (especially for timing). I used it in an instrument design circa 1993.

Cheers

Phil Hobbs

He hasn't said explicitly, but I'm 99.44% sure that he wants a PWM stage for power efficiency reasons -- he's not just looking for a low-level signal out, he's looking for some efficiently generated power at a finely controlled voltage.

So a class D amplifier is the way to go.

I think quite a few of them are not really using classic pwm, but more some sort of delta-sigma self-oscillating thing

If he needs to do the power drivers as well maybe something like an IRS2092

-Lasse

The class-D (audio) amplifiers I'm aware of fall into two categories, classic triangle/PWM ADC style and direct conversion (digital-PWM) DSP. The first category far outnumbers the second (even with digital input), at least for now. I don't know any that have the frequency range he's looking for, though. All are intended to operate somewhere around 300kHz to 500kHz, with a couple of new ones coming out at 2MHz.

Years ago, and I think it may still be in use, I modified a designed on a small low powered tape feeder. It had two small DC motors, one to pull the spool at constant speed and the other for tension control.

The power supply and machine was small (compact) so the supply current was limited. There were times where the tension would fight the speed and a small oscillation would occur. After some debugging I found the bus was becoming unstable when both motors required current at the same time. This would thus make bus voltage unstable and cause control loop problems.

Like I said, supply was limiting and hard to correct. The limited drive circuit was a PWM for both, one had a Tach feed back for the first motor and the other used the current as torque to regulate. I doubled the clock rate for the PWM and put a Flip flop in there to operate the drives out of phase from each other.

That corrected the problem. Something that makes PWM useful among other things.

Jamie

I was eyeing that one but it doesn't seem to have much DC stability and no compensation for dead time drift. At its switching frequency of

No matter how I toss and tumble it, this begins to look like another home-brew project.

Yup.

That could even be acceptable if they had DC stability and dead-time drift compensation (where they correct the OPWM accordingly).

You have to eyeball it because much also depends on the time the ICT needs per board, affecting production throughput. I have a few boards out there that are being in-circuit tested since day one and it isn't a huge cost factor. It's in Asia but labor costs don't matter much with ICT because it is largely automatic.

A huge factor is how well testability is designed into the board. To use power PWM stages as an example, it can be good to add a couple resistors and a cap so the ICT can gauge correct PWM operation all the way to the end. Costs 1-2 cents extra but can speed up testing and allow a cheaper ICT machine.

:-)