Transistors

I don't think so, not at 12MHz. I'm intimately familiar (not by choice :-) where multipli-intertwined feedback loops present problems, and defy analysis/simulation using existing LoopGain techniques.

Dr. Auggie Ochoa (Zarlink) and I are busily trying to solve this issue.

...Jim Thompson

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|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
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Your grade = "F" ;-)

...Jim Thompson

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|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
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How does that work?

There is a b-c diode junction, so Vb is pinned to 5V+0.7 = +5.7V. b-e is forward biased so Ve is 5.7 - 0.7 = 5V. Ie = 5/5k = 1mA.

In other words, I agree with Fred.

--

John Devereux

Jonathan Kirwan snipped-for-privacy@easystreet.com posted to sci.electronics.design:

Possibly, we have only a few milliamperes to deal with.

oops! forward biased.

Ic i expect to be a few mA And Vb about -5.66 V.

The Vbe reverse breakdown may or may not be reached, depends on the specific transistor. If it is reached Ie may be noticeable and will contribute to Ib and decrease Ic. With the resistors specified only the most sensitive NPN transistors would be destroyed.

krw snipped-for-privacy@att.bizzzz posted to sci.electronics.design:

What about Catholics vs Protestants? Can you say Belfast?

How about the War of Roses

I'll stick to my theory at 12MHz. Not that I don't think something like you're describing can happen with multiple feedback loops and serious rolloffs and their phase shifts as well as the pure time delays you like to use in your modeling, etc., but I haven't heard evidence for multiple intertwined loops in TI's opamp.

Back to inadequate transistor shutoff, unless the amplifier output stage circuit is operating class A this can be a serious issue. I've struggled with it at 3MHz and 5MHz for modestly-large discrete parts, and I know it's an issue at much higher frequencies for the small transistors in ICs. What's required is separate active perhaps class-A drivers for both the pullup and pulldown transistors, to insure they get at least partially turned off. Sadly one does not often see such pre-driving circuitry where it's so badly needed in high-power high-frequency ICs.

John can do a simple test to evaluate my theory: measure the opamp's rail-rail supply current as a function of high-voltage excursions at the highest frequencies and then as a function of current load under full swings in the same condition. Ideally the opamp should dissipate power only for current delivered to the load, i.e., small voltage drops across the output transistors at the high currents, without any high rail-rail currents in the process.

Looking at the THS3062 datasheet, I don't see any plots for opamp supply current vs frequency for full-scale output voltage swings. To me this is a bad sign of a serious issue that's been overlooked. Check it out, John, and let us know.

On a sunny day (Sun, 18 Nov 2007 08:50:10 -0800 (PST)) it happened Winfield Hill wrote in :

I was sort of looking at a different output a bit like your class A, ftp://panteltje.com/pub/amp1.jpg

This is classic and has about 50 Ohm output. Have only simulated DC... have to finds some transistors. Wha tdo yo uthink of the output stage? (Never mind the rest I just filled in what I felt like).

Am I not seeing something or is this a relatively trivial question? I can be tricked, but I hate to admit my stupidity so...

Oookay, so beta is somewhere around a hundred or so? Makes the calcs a little easier, All measurements wrt "gnd".

4.4 volts, 4.4 mA.

5 volts

(assuming b = 100) 44 uA

4.4 mA less 44 uA or virtually 4.4 mA

Well, lessee. THere's "about" 6 volts CE at "about" 5 mils, so the transistor will be dissipating "about"" 30 mW, hardly warm at the macroscopic case level. Fairly hot on a microscopic junction level. Resistor dissipating "about" 20 mW, again not warm. Perhaps if the + supply is being done by toobs...

Yeah, it'll probably sing like a bird if that 5 volt base supply is AC hard to ground and there is the slightest unintended (wire) inductance in the collector supply.

Or did you catch me somewhere? Or did my mental math screw me up again (no calculator handy).

Jim

Jan Panteltje snipped-for-privacy@yahoo.com posted to sci.electronics.design:

There is a SPICE model available. Maybe you could play with it and find out what is going on.

This is "inverted saturation". The exact value of Ve can be a bit above or below +5, depending on the transistor. With some transistors, tweaking the base current, Ve can be tuned to exactly +5 volts.

It's really saturated, meaning that the emitter isn't just a diode drop down from the base, it's pretty much glued to the collector.

I once designed a rack full of 16 bit DACs, for a military system. Each DAC board used an R-2R ladder made from hand-selected wirewound resistors, and the switches were all inverted-saturating PNP/NPN pairs, collectors riding on +-10 reference rails. The base currents of the first few bit switches were trimmed for zero saturation offset.

John

[snip]

"Looking at the THS3062 datasheet" I see a woefully inadequate characterization, and no clue presented as to actual operation.

Look at the "dipsy-doodles" in the closed loop response in Figures 15 and 16... that is scary!

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
|  Phoenix, Arizona            Voice:(480)460-2350  |             |
|  E-mail Address at Website     Fax:(480)460-2142  |  Brass Rat  |
|       http://www.analog-innovations.com           |    1962     |
             
         America: Land of the Free, Because of the Brave

That's a good example of a circuit that will get into serious trouble above 100kHz or so... No good way to rapidly turn off the unused transistors.

Drooling on the keyboard works, too.

John

Yep, boopsy-doopsy! Pshaw, you neocons are easily scared.

On a sunny day (Sun, 18 Nov 2007 09:09:36 -0800 (PST)) it happened Winfield Hill wrote in :

OK, :-) if you say so.

Probably a macromodel circuit that doesn't accurately model John's observed "latch up and catch fire" response to a perfectly ordinary stimulus.

Best regards, Spehro Pefhany

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As an IC designer, this is your business, but in reality only a minority of EEs and techs can predict the behavior of a transistor in any but a few cookbook situations.

As far as my original NPN thing post goes,

+10V | | | c +5V--------b e | | | 1K | | gnd

can anybody discuss the AC voltage at the emitter?

John

I don't think we're going to spend much more time trying to understand what's going on inside the opamp; what we need to do now is get a product ready to ship, which means finding another opamp that can swing +-10 volts at 32 MHz, or change the module specs to +-5 volts max swing and use any one of a zillion opamps that can do that from, say, +-7 volt rails.

We have noted that, at +-10 peak sinewave output swing, unloaded, as the frequency is increased, the supply current is flat to 10 MHz or so, creeps up a bit, then at 12 MHz it jumps to 400 mA, phase reverses, and it starts making blisters on fingertips. Reducing the frequency or drive amplitude a lot - 3:1 or some such - snaps it back to reality.

How can they ship junk like this? And why has TI tech support stonewalled us for 6 weeks now?

John

What's the advantage over using a two-diode gate? Okay, a *matched pair* two-diode gate...

I would suppose those dual diode SOT23 bits would work well for that.

Tim

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