So here I am, needing more than the usual 32V opamp. Chose ye olde MC33174 because it can take 44V but was surprised when I read that the usual SO14 package is only rated at 154C/W. Since I am burning 500mW that would become too toasty, ouch. Or I'll have to idle two amps each in there and double the number of chips.
So, is 500mW in a SO14 really too much? What do thee say?
--
Regards, Joerg
http://www.analogconsultants.com/
"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
If Tj max is 150C, and if Theta(ja) is really 154C/W and you're dissipating
500mW, then your allowable maximum ambient temperature is:
150 - 0.500*154 = 73C
It'll be effing hot, but it should work.
Also, some of the thermal power will go through the leadframe and into your pcb, so the die temperature won't really be as high as the Theta(ja) calculation suggests, because (iirc) Theta(ja) doesn't include this path.
Bob
--
== All google group posts are automatically deleted due to spam ==
Yeah, and I don't like things getting effing hot :-)
Are you sure about that? It would not be too useful to publish data for a situation that is impossible in practice. I mean, an opamp needs to be soldered down before it can do anything.
--
Regards, Joerg
http://www.analogconsultants.com/
"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
It *is* useful, and nothing about it is impossible in practice. It's difficult to characterize the heat conduction through the lead frame, and not including it in Theta(ja) makes the formula more conservative. If you do the design based on Theta(ja), you'll have a slight bit of additional margin.
Actually, one of the few situations where it is possible, in practice, to characterize the thermal impedance of an IC (in a specific package), is when you are the manufacturer of that IC. All they need is a standard panel template for the mounting arrangement in question. That is where the published data should originate.
Normally, to ensure a reasonable MTBF, you'd want a pre-established margin between predicted operating extremes and specified junction limits.
Everyone has their own opinion when it comes to characterization and employment of thermal data - so it's worth while tracking down any available info on the specific part in question, should the issue become obviously relevant. Larger packages, or packages with many pins (~ more than six) become increasingly predictable, for a fixed construction.
It is my understanding that the thermal impedance test methods outlined by jedec (JESD051) include mounting hardware for surface-captive components, whether surface-mount or through-hole. TI app notes below reflect this.
Check out:
Nat Semi AN336 Nat Semi AN1028 SOT223 TI SZZA017A - board trace effects TI SCAA022A - board trace effects TI SLMA002 - enhanced packaging FSC AN1029 SO8 FSC AN1025 SOT23
There are on-line tools at some mfr's web sites. eg:
A heatsink glued onto a BGA? Wow, that takes guts.
Nah, I'll go to singles but right now I am trying to knock down the power via some inductive kicker tricks. It's a HV switch bank where these opamps have to hold programmable biases. If I can shave off another 500uA/channel I might just be back to a quad package. Unless there is a really compelling reason like I am sure there is in many of your cases I try to keep everything cool, to the point where you can operate without heatsinks yet touch everything with screaming. Well, ok, one should not touch this high voltage stuff ...
--
Regards, Joerg
http://www.analogconsultants.com/
"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Guts? Why? It's soldered to the board in 456 places, which should be pretty stiff.
I've got used to touching everything to see how hot it is, or to finagle suspected RF oscillations. And get occasionally blistered/shocked for the trouble.
Yeah but if that number is reduced to 455 places some grief could set in :-)
So do I. But if I get a blister I want to know why and what can be done about the circuit to chill it.
Reminds me of a sad case. A very experienced power engineer guided a tour for some bigshots. He was a neat freak. The whole place looked spiffy, not a speck of dust. Then, a fly landed on a distribution rail. Instinctively he wanted to flick it away. That was the last millisecond of his life :-(
--
Regards, Joerg
http://www.analogconsultants.com/
"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Are those commercial heatsinks? They don't look as nice as the rest of the board. I wonder why they didn't machine square or rectangular posts rather than round.
Is that LPI 'silk screen' ?
Nice.
Is 'MS' your layout guy/gal?
Best regards, Spehro Pefhany
--
"it\'s the network..." "The Journey is the reward"
speff@interlog.com Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog Info for designers: http://www.speff.com
You'd have to be doing something extremely wrong in order for epoxying a small heat sink to a properly soldered BGA to result in any of the bonds failing. Are you applying the heat sink with a hammer or crowbar or something?
Opposite experience. We've used hundreds of BGAs, mostly FG456's, nearly all placed and soldered in-house, with exactly 100% success.
The only one we've ever removed and replaced was a couple of weeks ago, and that was a mistake. There was a power plane short, nobody could find it, so somebody decided to remove the BGA. NEEP! That wasn't it. I dumped a 6-amp power supply into the plane and hit it with the Flir imager... sure enough, a ceramic cap glowed in the thermal IR... a simple solder bridge that nobody spotted.
We have a lot more trouble with TSSOPs and other fine-pitch leaded parts. US8's are the pits. One nice thing about BGA solder joints is that you can't inspect them, which saves a lot of production time.
It's liberating to have 200,000 gates and 300 i/o pins, in about a square inch, at your disposal.
Same here, MLFs and QFNs are just as difficult to deal with in production lines. We are skipping packagings all together. Chip On Board (COG) die bonding is just as easily to order as anything else, but usually 1K minimum.
It's even better to be able to define your own footprints. We are using a 68 pads die with 32 pins in one project and 44 pins in another. They are just die bonded differently.
ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here.
All logos and trade names are the property of their respective owners.