SO14 package at 154C/W? Really?

If Tj max is 150C, and if Theta(ja) is really 154C/W and you're dissipating

150 - 0.500*154 = 73C

It'll be effing hot, but it should work.

Also, some of the thermal power will go through the leadframe and into your pcb, so the die temperature won't really be as high as the Theta(ja) calculation suggests, because (iirc) Theta(ja) doesn't include this path.

Bob

Yeah, and I don't like things getting effing hot :-)

Are you sure about that? It would not be too useful to publish data for a situation that is impossible in practice. I mean, an opamp needs to be soldered down before it can do anything.

It *is* useful, and nothing about it is impossible in practice. It's difficult to characterize the heat conduction through the lead frame, and not including it in Theta(ja) makes the formula more conservative. If you do the design based on Theta(ja), you'll have a slight bit of additional margin.

Anyhow, I'll go with single amps in SO8 then. More conservative, I don't want anything to get hot.

Actually, one of the few situations where it is possible, in practice, to characterize the thermal impedance of an IC (in a specific package), is when you are the manufacturer of that IC. All they need is a standard panel template for the mounting arrangement in question. That is where the published data should originate.

Normally, to ensure a reasonable MTBF, you'd want a pre-established margin between predicted operating extremes and specified junction limits.

Everyone has their own opinion when it comes to characterization and employment of thermal data - so it's worth while tracking down any available info on the specific part in question, should the issue become obviously relevant. Larger packages, or packages with many pins (~ more than six) become increasingly predictable, for a fixed construction.

It is my understanding that the thermal impedance test methods outlined by jedec (JESD051) include mounting hardware for surface-captive components, whether surface-mount or through-hole. TI app notes below reflect this.

Check out:

Nat Semi AN336 Nat Semi AN1028 SOT223 TI SZZA017A - board trace effects TI SCAA022A - board trace effects TI SLMA002 - enhanced packaging FSC AN1029 SO8 FSC AN1025 SOT23

There are on-line tools at some mfr's web sites. eg:

RL

NE5532 ? That's rated at +/- 22V IIRC. I think I've seen them in SMT in recent years.

Large input bias current IIRC though.

Graham

Thanks! Pretty cool tool. Kinda sez to me not to use SO14 ;-)

Max supply current is 16mA. At 40V VCC it'll almost unsolder itself :-)

Epoxy a heat sink on top. I have a board right here on my desk that has a heatsink on an FPGA, and two more on some dual dacs.

ftp://66.117.156.8/DSC01786.JPG

Or put a power pad below on the pcb layout, some thermal vias to a plane, and use a dab of epoxy between the part and the board.

John

A heatsink glued onto a BGA? Wow, that takes guts.

Nah, I'll go to singles but right now I am trying to knock down the power via some inductive kicker tricks. It's a HV switch bank where these opamps have to hold programmable biases. If I can shave off another 500uA/channel I might just be back to a quad package. Unless there is a really compelling reason like I am sure there is in many of your cases I try to keep everything cool, to the point where you can operate without heatsinks yet touch everything with screaming. Well, ok, one should not touch this high voltage stuff ...

Guts? Why? It's soldered to the board in 456 places, which should be pretty stiff.

I've got used to touching everything to see how hot it is, or to finagle suspected RF oscillations. And get occasionally blistered/shocked for the trouble.

John

Yeah but if that number is reduced to 455 places some grief could set in :-)

So do I. But if I get a blister I want to know why and what can be done about the circuit to chill it.

Reminds me of a sad case. A very experienced power engineer guided a tour for some bigshots. He was a neat freak. The whole place looked spiffy, not a speck of dust. Then, a fly landed on a distribution rail. Instinctively he wanted to flick it away. That was the last millisecond of his life :-(

I've NEVER known one take 16mA. I use 8mA as a guideline when estimating PSU requirements (TI typical 352mW). Typical from Fairchild is 6mA i.e. 264 mW.

Graham

Yes, sure, but this is a medical design. There you must always do a hazard analysis (FMEA and all that) and assume datasheet limits. If no limits are given you cannot use the part.

When you do medical for a few decades this stuff rattles on automatically in the back of your head. You can't turn it off anymore ;-)

Are those commercial heatsinks? They don't look as nice as the rest of the board. I wonder why they didn't machine square or rectangular posts rather than round.

Is that LPI 'silk screen' ?

Nice.

Is 'MS' your layout guy/gal?

Best regards, Spehro Pefhany

Die cast, I think. They are from Cool Innovations, who are up near you. What I'd really like is anodized colors.

Dunno, but the ref desigs are 60 mils high, and are pretty readable. That doesn't always happen.

Mike. He does our pcb stuff and Autocad/Solidworks stuff. He's good, so I won't give his last name.

Incidentally, this is rev A of the board, and it works: no kluges.

Lower-left is where the Xport ethernet brick goes. We press-released it and got a lot of hits, so you may see it in a mag or something.

Hey, google T346

This is amazing. Google has changed the whole game.

John

Sure, but they don't know what you will have the lead frame soldered to, how well it will be soldered, etc.

Not particularly. Once the BGA is soldered down, there's nothing special about attaching a heatsink to the top of it.

Joerg wrote:

You'd have to be doing something extremely wrong in order for epoxying a small heat sink to a properly soldered BGA to result in any of the bonds failing. Are you applying the heat sink with a hammer or crowbar or something?