neat paper on SiC history

Instead of a Krytron, consider using a Sprytron for your global domination project. Unlike the Krytron, which is gas filled and weakly ionized by a nickel-63 source, the Sprytron uses a hard vacuum and no radioactive source. Hopefully it's cheaper than the eBay price on a Krytron: which might explain why Silicon Investigations is considering manufacturing these.

Mainly, no. Sony tried, for a while, and dynexsemi.com can replace some. Turnoff current was inconveniently high.

The reason for slow turnon in thryistors is lateral conduction, aka dI/dt limit, and phototrigger means that goes away (you don't diffuse current sideways from a gate electrode because there's no gate electrode). Turn-off is slow (can get to ultrasound frequency).

Photothyristors don't get much attention (outside the toy-scale ones in optoisolators) so the turnon speed isn't a spec that one can easily look up on a datasheet. Optoisolator LEDs are NOT fast-rise-time light sources.

ARE there any commercial off-the-shelf big photothrystors?

snip

Pontiac division closed its doors over a decade ago.

Hehehe... :-)

That's what I meant, except with a 500 ohm source.

I tried it. 24V/3nS rise through 560 ohms. All I got was an R-C curve without the hoped-for initial step. There's a small discontinuity roughly at Vth. Not very helpful.

Looks like Clifford was right--Cds and Rg are distributed.

The R-C suggests Cgs=370pF @ Vds=0, nearly double Cgs (typ) of 200pF @ Vgs=1kV.

I'm not sure it helps compared to, say, overdriving the gate, as I am (19V, where 15V would do).

Right now I can pump 4A @ t=0. With 20nH in series it would take me two nanoseconds to get up to that current through the inductor, at which point I'm 500pS from being done and don't want to go higher.

If I were driving with a voltage close to the desired final Vgs, yes, the inductor peak would kick in and assist up at the top, as the R-C exponential charging was petering out.

Cheers, James Arthur

I've done 20 volts *with* an inductor.

And maybe over-voltage the hidden gate node inside.

Here are some pics.

The initial glitch looks roughly like a 70 ohm transmission line 200 ps long; that's probably wire bonds and epoxy and such. The transmission line idea could work in a model.

The curve bottoms out at about 7.5 ohms.

The exponential charge eyeballs to about 450 pF.

I should compare these to a Spiced TDR using the Cree model.

I once worked with a now-gone company that made a truncated diamond cone, metal electrodes top and bottom. They blasted it with a picosecond laser from above, and the whole thing conducted hard and fast. It worked at lots of kilovolts.

Probably expensive.

The visual distortion isn't very good, but the extracted curve looks pretty damn single-pole RC within that tolerance:

Don't understand the slower ringing. Seems to be a pretty reasonable Q, low amplitude (large mismatch). Something about the generator into a capacitive load, maybe?

What's the actual open circuit voltage? 2V? That affects the calculated R (and RC product, in turn) -- I just assumed 50 ohms for starters here. ( Anyway, there's the data, just ratios from here.)

Tim

The TDR is really good, 30 ps rise time, super clean step, really 50 ohms. The ringing is probably device inductances and capacitances.

The TDR step is 0.5 volts from 50 ohms, unloaded. Namely 10 mA.

The scope calculates resistance at the cursor points, which is how I got the gate resistance number. This TDR isn't very accurate at low resistances, and the numbers are entangled with the capacitance charging.

The Cree Spice model is probably good enough for most cases, but it never hurts to cross-check a bit.

Their substrate diode model is definitely bad; it seems to assume zero forward recovery time. My TDR can't source enough voltage to see that.

They're using them to invert DC links back to AC, too big perhaps?

Well, not 10mA when not a short circuit...

Then what's the vertical scale? It seems to say 400m/div (mV?), which is about 4 times what you say it should be.

Well yeah, the effective impedance of a capacitor, in the time domain, is rising. You can convert that to a capacitance using a straightforward function (what function is an exercise for the student).

Well, does it use a SPICE diode statement, or is it a macro model?

Surprisingly, I've not seen forward recovery on body diodes below 200A/us. Seems to be a characteristic. If nothing else, it must be less than ~5V peak, for the same reason that your favorite PHEMT or GaN FET is a good diode when used the same way. Or somewhat different but also not: a schottky diode.

Tim

Here's roughly my situation (first order approximation, ignores non-linear capacitance):

Version 4 SHEET 1 880 680 WIRE 448 64 96 64 WIRE 576 64 528 64 WIRE 576 112 576 64 WIRE 96 144 96 64 WIRE 96 144 -80 144 WIRE 144 144 96 144 WIRE 256 144 224 144 WIRE 368 144 336 144 WIRE -80 176 -80 144 WIRE 368 192 368 144 WIRE 576 192 576 176 WIRE 368 272 368 256 WIRE -80 288 -80 256 FLAG 368 272 0 FLAG -80 288 0 FLAG 576 192 0 SYMBOL res 240 128 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 4.7 SYMBOL ind 352 128 R90 WINDOW 0 5 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName L1 SYMATTR Value 10nH SYMBOL cap 352 192 R0 SYMATTR InstName C1 SYMATTR Value 220pF SYMBOL voltage -80 160 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value PULSE(-5 19 0 2nS 3nS 20nS) SYMBOL res 544 48 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 4.7 SYMBOL cap 560 112 R0 SYMATTR InstName C2 SYMATTR Value 220pF TEXT 494 272 Left 2 !.tran 60nS

Series inductance definitely delays the gate-drive, and at the same time also definitely squares up the edge, just as we've both been saying.

Vgs(max) is -10V transmission line idea could work in a model.

Very nice. I think I'll try 50 or 100 ohms drive--maybe that'll tease the Rg step up out of the r-c exponential.

Cheers, James Arthur

The scope acts like a 50 ohm resistor to ground, with a switched 10 mA current source. That's what it actually is. It's morally equivalent to a 0.5 volt voltage source with a 50 ohm source impedance.

Here it is:

The big cavity is the dual-channel sampler. The two smaller ones are the switched current sources.

Milli-rho, reflection coefficient.

The impedance isn't rising. The voltage is.

Probably the voltage rate of rise is too slow. My dI/dT is pretty high.

Phemts don't have body diodes, but can be used as fantastic power diodes.

Anything else you want to complain about?

I forgot Rg in that treatment. The inductor starts looking a lot more attractive when we include Rg.

(I added a third scenario with Rg and Cgs quasi-distributed.)

Cheers, James

-------

Version 4 SHEET 1 920 692 WIRE 48 64 0 64 WIRE 656 64 128 64 WIRE 784 64 736 64 WIRE 800 64 784 64 WIRE 816 64 800 64 WIRE 784 112 784 64 WIRE 0 144 0 64 WIRE 0 144 -80 144 WIRE 48 144 0 144 WIRE 192 144 128 144 WIRE 352 144 272 144 WIRE 464 144 432 144 WIRE 480 144 464 144 WIRE 512 144 480 144 WIRE -80 176 -80 144 WIRE 464 192 464 144 WIRE 784 192 784 176 WIRE 464 272 464 256 WIRE -80 288 -80 256 WIRE 0 400 0 144 WIRE 64 400 0 400 WIRE 192 400 144 400 WIRE 384 400 272 400 WIRE 512 400 464 400 WIRE 544 400 512 400 WIRE 672 400 624 400 WIRE 720 400 672 400 WIRE 832 400 800 400 WIRE 848 400 832 400 WIRE 880 400 848 400 WIRE 512 432 512 400 WIRE 672 432 672 400 WIRE 832 448 832 400 WIRE 512 512 512 496 WIRE 672 512 672 496 WIRE 832 528 832 512 FLAG 464 272 0 FLAG -80 288 0 FLAG 784 192 0 FLAG 800 64 gate2 FLAG 480 144 gate1 FLAG 832 528 0 FLAG 848 400 gate3 FLAG 672 512 0 FLAG 512 512 0 SYMBOL res 144 128 R90 WINDOW 0 63 54 VBottom 2 WINDOW 3 64 54 VTop 2 SYMATTR InstName R1 SYMATTR Value 4.7 SYMBOL ind 288 128 R90 WINDOW 0 5 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName L1 SYMATTR Value 50nH SYMBOL cap 448 192 R0 SYMATTR InstName C1 SYMATTR Value 220pF SYMBOL voltage -80 160 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value PULSE(-5 19 0 2nS 3nS 20nS) SYMBOL res 144 48 R90 WINDOW 0 -27 61 VBottom 2 WINDOW 3 -27 61 VTop 2 SYMATTR InstName R2 SYMATTR Value 4.7 SYMBOL cap 768 112 R0 SYMATTR InstName C2 SYMATTR Value 220pF SYMBOL res 752 48 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R3 SYMATTR Value 20 SYMBOL res 448 128 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R4 SYMATTR Value 20 SYMBOL ind 288 384 R90 WINDOW 0 5 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName L2 SYMATTR Value 50nH SYMBOL cap 816 448 R0 SYMATTR InstName C3 SYMATTR Value 75pF SYMBOL res 816 384 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R5 SYMATTR Value 6 SYMBOL res 480 384 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R6 SYMATTR Value 7 SYMBOL res 640 384 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R7 SYMATTR Value 7 SYMBOL cap 656 432 R0 SYMATTR InstName C4 SYMATTR Value 72pF SYMBOL cap 496 432 R0 SYMATTR InstName C5 SYMATTR Value 72pF SYMBOL res 160 384 R90 WINDOW 0 63 54 VBottom 2 WINDOW 3 64 54 VTop 2 SYMATTR InstName R8 SYMATTR Value 4.7 TEXT 200 296 Left 2 !.tran 60nS TEXT 400 312 Left 2 ;SiC FET TEXT 704 240 Left 2 ;SiC FET TEXT 768 568 Left 2 ;SiC FET RECTANGLE Normal 544 288 336 96 2 RECTANGLE Normal 864 224 624 0 2 RECTANGLE Normal 912 560 336 336 2

I've been using the Cree model, and my real loads, in sims and the optimum series L is bigger. The Miller current changes things some. But overall the improvement is incremental. I'll probably include an L on my board, and use it if it helps usefully.

Cree won't give me their model. You have to register to get it, but their web script rejects my actual e-mail address as beneath its dignity.

If I lazily lump the typical Cgs and Rg, though, *adding* an external Cgs looks interesting. Where Rg is high, Cext lets you load up L, quickly, to a controlled current (and stored energy) not otherwise attainable.

Have you ever tried that?

L : Rg ||----- - - : .-------^-------. ||---' ' '--+---:--[R]-+-[R]-+-[R]-+-'|--+ | : | | | | --- : --- --- --- | Cext --- : --- --- --- | | : | | | === === :

V(gate1) and V(gate2) in the LTSpice file below compares waveforms with and without Cext.

Cheers, James Arthur

Version 4 SHEET 1 920 692 WIRE 48 64 0 64 WIRE 240 64 128 64 WIRE 656 64 320 64 WIRE 784 64 736 64 WIRE 800 64 784 64 WIRE 816 64 800 64 WIRE 784 112 784 64 WIRE 0 144 0 64 WIRE 0 144 -80 144 WIRE 48 144 0 144 WIRE 192 144 128 144 WIRE 304 144 272 144 WIRE 352 144 304 144 WIRE 464 144 432 144 WIRE 480 144 464 144 WIRE 512 144 480 144 WIRE 304 160 304 144 WIRE -80 176 -80 144 WIRE 464 192 464 144 WIRE 784 192 784 176 WIRE 304 240 304 224 WIRE 464 272 464 256 WIRE -80 288 -80 256 WIRE 0 400 0 144 WIRE 64 400 0 400 WIRE 192 400 144 400 WIRE 384 400 272 400 WIRE 512 400 464 400 WIRE 544 400 512 400 WIRE 672 400 624 400 WIRE 720 400 672 400 WIRE 832 400 800 400 WIRE 848 400 832 400 WIRE 880 400 848 400 WIRE 512 432 512 400 WIRE 672 432 672 400 WIRE 832 448 832 400 WIRE 512 512 512 496 WIRE 672 512 672 496 WIRE 832 528 832 512 FLAG 464 272 0 FLAG -80 288 0 FLAG 784 192 0 FLAG 800 64 gate2 FLAG 480 144 gate1 FLAG 832 528 0 FLAG 848 400 gate3 FLAG 672 512 0 FLAG 512 512 0 FLAG 304 240 0 SYMBOL res 144 128 R90 WINDOW 0 63 54 VBottom 2 WINDOW 3 64 54 VTop 2 SYMATTR InstName R1 SYMATTR Value 4.7 SYMBOL ind 288 128 R90 WINDOW 0 5 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName L1 SYMATTR Value 30nH SYMBOL cap 448 192 R0 SYMATTR InstName C1 SYMATTR Value 220pF SYMBOL voltage -80 160 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value PULSE(-5 19 0 2nS 3nS 20nS) SYMBOL res 144 48 R90 WINDOW 0 -27 61 VBottom 2 WINDOW 3 -27 61 VTop 2 SYMATTR InstName R2 SYMATTR Value 4.7 SYMBOL cap 768 112 R0 SYMATTR InstName C2 SYMATTR Value 220pF SYMBOL res 752 48 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R3 SYMATTR Value 20 SYMBOL res 448 128 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R4 SYMATTR Value 20 SYMBOL ind 288 384 R90 WINDOW 0 5 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName L2 SYMATTR Value 30nH SYMBOL cap 816 448 R0 SYMATTR InstName C3 SYMATTR Value 75pF SYMBOL res 816 384 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R5 SYMATTR Value 6 SYMBOL res 480 384 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R6 SYMATTR Value 7 SYMBOL res 640 384 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R7 SYMATTR Value 7 SYMBOL cap 656 432 R0 SYMATTR InstName C4 SYMATTR Value 72pF SYMBOL cap 496 432 R0 SYMATTR InstName C5 SYMATTR Value 72pF SYMBOL res 160 384 R90 WINDOW 0 63 54 VBottom 2 WINDOW 3 64 54 VTop 2 SYMATTR InstName R8 SYMATTR Value 4.7 SYMBOL cap 288 160 R0 SYMATTR InstName C6 SYMATTR Value 150pF SYMBOL ind 336 48 R90 WINDOW 0 5 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName L3 SYMATTR Value 30nH TEXT 200 296 Left 2 !.tran 60nS TEXT 400 312 Left 2 ;SiC FET TEXT 704 240 Left 2 ;SiC FET TEXT 768 568 Left 2 ;SiC FET RECTANGLE Normal 544 288 336 96 2 RECTANGLE Normal 864 224 624 0 2 RECTANGLE Normal 912 560 336 336 2

Email me and I'll send it, with a working LT Spice case. It was a minor nuisance to install into Spice.

Their model has 5 pins, the usual three and two for temperature. You've got to me careful about the Tcase and Tjunction pins, because they can output tens of amps into unsuspecting circuits. It took me a while to figure that out.

The Cree models are widely criticized as hacks, but seem to mostly work.

Adding gate capacitance on purpose? That's horrifying. But series L helps a little, if you have a reasonably stiff and very fast driver... what is Vin coming from?

I guess if the SiC gate is a sufficiently distributed RC mess, unusual things may apply. Adding the external C makes visible a potential gate over-voltage spike that is conviently invisible if we assume only internal capacitance.

This thing I'm working on, every time I solve a problem, I create a new one. SiC is great, but needs a gnarly gate driver. I can design that, but find that I've just moved the hard bits a little to the left on the schematic. The good thing about really difficult designs is that it keeps most of the competition away.

I'll run your thing later. I need a break from electronics. It's gorgeous today, warm and clear, good hiking weather.

Thanks John. e-mail sent.

A hairy gate driver, hopefully.

Rain, rain, snow and rain. Good day for electronics.

Cheers, James Arthur

Was in San Jose all week. Nice weather (high about 70) but that's about all I can say for the place.

snip

No burnt wood smell?