Meaningless. Does the SPICE model include gate breakdown mechanisms? Going to guess not.
Much more likely you're seeing G-S inductance. You need to add probes inside the SiC device model to find actual Vgs, if they model it at all (they probably do, it's pretty normal to have package parasitics added inside the file).
Tim
Probably not. Spice models often ignore breakdowns. LT Spice will gladly let you put -100KV across a 1N914.
But I wouldn't want to run a SiC fet at -130 gate bias.
No, what's happening is SiC d-s capacitance making a voltage divider with Cgs and the GaN capacitance, and maybe some substrate diode effects. Obviously, I have a lot of drain current when the stack shuts off.
Ah, huge Coss at low voltages? Yeah, that acts like reverse recovery, it just stays "on" no matter what you do.
Easy enough to deal with, just put a TVS across the GaNFET. Doesn't need to be very big to handle 20A+ peak load current for the nanoseconds it takes to charge. TVS diodes are hard core, they'll do that literally forever. Or just don't drive the GaN so fast. Use a CD4000 buffer instead of 74HC (let alone whatever your house family of TinyLogic is). :^)
Only solution for speed is a Baker clamp of sorts. Wastes efficiency, obviously. Or do it old fashioned with a stack of GaNFETs...
Reminds me, I still need to test SuperJunction transistors as RF amps. They sure like to sing at 300MHz when I'm not using them as amplifiers.
Tim
We simulated ways to keep the SiC source voltage from flying up too far, but all had side effects. TVS's have a lot of capacitance and would maybe fry.
We want nanosecond switching of kilovolts, so if the cascode doesn't work (or is just too risky) I need to ground the source and use a vicious SiC gate driver... amps in picoseconds.
Tuned RF circuits are always sort of oscillating. Wideband switching puts constraints on the circuit that encourage things to oscillate at any frequency they pick. The usual fix is to just slow things down.
Well you have your choice of "tons of capacitance" or "some capacitance", which one is faster? A net gain is a net gain.
If you're capacitance limited, you can't have nanoseconds, period, no matter how you cut it. You simply don't have the load impedance * output capacitance to get there.
You can feed forward -- Cds from the GaN FET to output looks temptingly like this -- but it's illusory, and the logical continuation is simply the GaN stack with no SiC at all.
There is something to be said for spark discharge technology, even in 2018.
Tim
The big limit on SiC fet speed is internal series gate resistance, so at some point driving harder doesn't help much.
Thyratrons (or krytrons!) would be cool, but the rep rates would be low. Some krytrons fired only once.
Can't you add inductance in the gate so it flies up with the source, to keep Vgs from going too high, the way McEwan shows?
We discussed this some years back and IIRC Win Hill simulated or even tried it.
Clifford Heath.
Series inductance is bad though--it prevents you from being able to drive the gate quickly. Some sort of common-mode transformer combined with a super-low capacitance clamp might might save the gate.
I suspect my speed limit, though, is gate resistance. I really ought to measure it on real parts. . . . . . . . . . . : Rg :
: | : : --- Cgs : : --- : ' . . . . .|. . . . ===
If I experimentally measure the time constant for two values of R1 I believe I can solve for Rg. Or if I just hit it fast enough and measure before Cgs charges any, I could just read the resistive divider directly, too.
Hmmm. 200pF Cgs x R1=500 = 100nS, and I'd expect about half a volt signal. Seems reasonable.
Cheers, James Arthur
I't been years since I looked at McEwan's patent, but I think it involved a parallel inductance. Removing the drive current makes it fly up before it drops back to a holding level, but I forget exactly how that was done.
The trouble with that is it's probably gate spreading resistance. If you drag the bit near the wirebond high you could damage the gate in that region even before most of Cgs starts to charge.
Clifford Heath.
The technique I saw was to apply a massive over-voltage to the gate for long enough to charge up the bond-wire's inductance (, then drop the drive to something reasonable. An avalanche transistor, for example, could do that.
You skipped the part about R1=500 ohms--there's no worry about hurting anything with that! Win's pounding his through just a couple ohms.
Cheers, James Arthur
No I meant after you've measured Rg, then you want to hit it in a way that stops Cgs exceeding some threshold. Trouble is, Cgs is spread across the length of Rg, so bits of it will be at almost the drive voltage anyway.
Pretty cool for a grape-sized gadget invented in roughly 1940.
The rep rate would be low, and too much jitter. And can you still buy krytrons?
LANL is still making bombs. I'm guessing they're not using SiC MOSFETs...
Everything has a price. What price, that's the question. ;-)
Tim
Photothyristor? The HV does your drive for you, on turnon.
HV, check. Big amps, check. Turnon: fast as external circuitry allows. Turnoff, not so speedy. Could series it, though, with a SiC enable device.
Duh, turn it off by shunting the output with another. ;o)
Tim
That's only for convenient measurement. That way if I'm fast enough I can read the R1-Rg voltage off the 'scope & treat Cgs as a short.
Cgs being distributed across Rg would be quite helpful by spreading out the current density when driving hard by distributing the insult, but less helpful when trying to measure Rg :-).
The C2M1000170J I'm using has a Kelvin source lead, providing handy access for the gate driver to bypass Ls' drop at high di/dt.
| Lg ||--' .-.-. ||--[Rg]---' ' '---+---'|--+ | | Lds '---||--+ .-.-. Cgs | Driver S >--' ' '----------+ | ) Ls ) | ^ S
Without that, Ls is like emitter degeneration, turning the FET into a constant current source instead of a switch.
Cheers, James Arthur
Fun.
Cheers
Phil Hobbs
I don't think that nukes still use krytrons.
Krys contain radioactive nickel, so would be hard to manufacture.
High-power microwave weapons are rumored to output terawatts and rumored to use diamond-based solid-state closing switches to dump caps into antennas, or something.
Make a poor-man's TDR. Just ground the source and connect a 50 ohm pulse generator to the gate and look at the rise waveform on a scope.
Hey, I should TDR a Cree part. Why haven't I done that yet?
You can add an external L in series with the gate, tens of nH range. That makes an RC circuit into an RLC circuit, just like peaking a video amplifier. It speeds things up a little, with the hazard of possible oscillations and maybe ringing past the max rated gate voltage.
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