Hot carrier effect "HCI" in CMOS_FET Transistors

Jim,

Do you have for your macro also a model function which relate degradation indicator (usually Isub, and/or Ig) to Age with some parameters, which is my favorite point?

Thanks,

But I still need a documentation of a simulating tool in HCI, to know how it works. Then should implement it in SABER or other design and simulation tool, my work is about deep submicron NMOS!

brgrds

I'm not familiar with the tools you mention. But the foundries I work with specify the SOA regions, and I just write my own macros in PSpice to view the device SOA's in Probe.

...Jim Thompson

No. I'm in the circuit design arena, and all I have in macros simply reflect the foundry's restrictions for hot electron SOA.

For example...

SOAG(M,VDS,VGS)=(SGN(VD(M)-VS(M)-VDS)+1)*(SGN(VG(M)-VS(M)-VGS)+1)/4

which produces a "1" if rules are violated, "0" otherwise (IIRC ;-)

...Jim Thompson

I believe full-flavored Cadence has it. IIRC, it was a Cadence seminar I went to where I figured out how to do the same thing on a (relatively) cheap tool.

...Jim Thompson

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