I made some nice four-wire copper RTDs on flex--22 mm square, about 38 ohms in 1/3 oz copper.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
Chopamps being cheap these days, you wouldn't need a lot of ohms to make a usable RTD, so it should be feasible to do one with a small patch of 5 mil, 1 oz traces. That would be about 10 ohms per square inch, plenty to work with.
-- John Larkin Highland Technology, Inc picosecond timing laser drivers and controllers jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
I like the RTD.
Fun fact: a copper path's thermal resistance in oC/W is 140 times its electrical resistance in milliohms.
(assumes 40C copper, 385W/K*m thermal. Some references give from 355 to 398 W/K*m.)
Cheers, James Arthur
Right. Most pure metals have about 140,000 K/w per ohm.
I have data that suggests that brass is about twice that.
The other interesting number is capacitance per K/w, for practical insulators. BeO is best (ie, least c) and AlN is close. Diamond is better, of course, preferably isotopically pure diamond.
-- John Larkin Highland Technology, Inc picosecond timing precision measurement jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
Certainly. You want a box with fins inside and outside.
Ah, an ideal customer.
-- John Larkin Highland Technology, Inc picosecond timing precision measurement jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
can you elaborate on this black plague and weird cooling methods?
what did these modules do?
The cooling relied on the chips sitting in a bath of CFCs with a cold plate on the opposite side. The phase change of FC-86 (86C boiling point) kept the chips at the desired temperature. Boiling distilled the CFC, so any crud was left behind on the chips. The crud was a black slime (likely some aluminum sort of residue, though I don't remember) and it killed the modules, hence "Black Plague". ;-)
They were the logic technology used in the 3080 thru ES9000 (ci
1980-1994) mainframes. A CPU was something like 12 modules. A large system may have had eight CPUs. A Channel Director, 9 modules (four, Channel Directors max, IIRC). All ECL, hence the heat. They went away when CMOS caught up with ECL, though the first generation of CMOS machines was significantly slower. It was clear that the world was going CMOS, not bipolar.
That was also a concern. It took a lot of "hot" time to assemble everything, of course.
Still working on the transformers, so I haven't fully tested it. But they ohm out correctly (nothing at gate, diode at drain; ohmic when gate is precharged with a positive "diode test", then slowly leaking away).
Tim
-- Seven Transistor Labs Electrical Engineering Consultation Website: http://seventransistorlabs.com
Someone posted a link to these things a while back. Might be useful for providing the electrical isolation part, in conjunction with some sort of metallic bridge to the enclosure.
Ah yes, John posted those a ways back methinks. That's a dam^H^H^H dar^H^H^H very good idea. I wonder what the thermal conductance of 10M resistors is, or 0pF capacitors. I guess resistors are alumina--not that good.
K W/m*K Diamond Copper* 355 Aluminum 175 Solder Sn/Cu/Au 58 Solder 63/37 39 Al Nitride** 150 Si Carbide** 60 Alumina** 32 Si Nitride** 20 FR-4 0.25 Air 0.0275
Cheers, James Arthur
Thermal conduction modules (TCMs). Later ones used oil instead of helium. Google
IBM thermal conduction module
and more stuff comes up than you're likely to want to read. Pretty cool at the time. I remember as a youngster reading about the 3081 in Scientific American. (That was before SA went all Hollywood in about
1990. I have a complete set 1959-1990.)Yeah, we had our lunch eaten by Fujitsu/Amdahl for one product generation, till they had to go CMOS too.
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
I have a small program that generates bitmaps of rectangular serpentine patterns that can be imported into Eagle. Much easier than doing it by hand!
Cheers
Phil Hobbs
-- Dr Philip C D Hobbs Principal Consultant ElectroOptical Innovations LLC Optics, Electro-optics, Photonics, Analog Electronics 160 North State Road #203 Briarcliff Manor NY 10510 hobbs at electrooptical dot net http://electrooptical.net
By hand? I use Brats to do stuff like that.
We're evaluating the new version of PADS. One thing The Brat dislikes is replicating 8 or 12 or 16 identical channels on a board layout. The new PADS does physical replication, and does NOT need a hierarchial schematic. You lay out one channel and effectively copy/paste it somewhere else, and it finds and places the parts. I can't imagine how it can figure that out; in fact it seems to make minor mistakes.
-- John Larkin Highland Technology, Inc picosecond timing laser drivers and controllers jlarkin att highlandtechnology dott com http://www.highlandtechnology.com
Den onsdag den 11. marts 2015 kl. 16.16.52 UTC+1 skrev John Larkin:
With hack Eagle can do the same thing,
open only the PCB, copy paste the are you want duplicated open only the schematic, copy paste the same part you did in PCB
it seems increment part numbers so it works out, and tacks a _1, _2 etc. onto all net names so that also works out, except for gnd, vcc, etc. that ends up as gnd_1, vcc_1 so you have to manually fix that
-Lasse
OrCAD (whatever the layout program is called) did the same thing at least five years ago. It was pretty good at figuring out components, too. I did hierarchical schematics when it made sense, though.
Ick! Why would it change *any* net names? That's terrible.
Den torsdag den 12. marts 2015 kl. 00.29.23 UTC+1 skrev snipped-for-privacy@zzz.com:
it has to when you copy. you don't want all the nets in the copy to be connected to the original except for thing like ground and supply
-Lasse
No, you don't want the layout tool to change *anything* on the schematic (unless you intentionally back-annotate).
Den torsdag den 12. marts 2015 kl. 01.00.42 UTC+1 skrev snipped-for-privacy@zzz.com:
you miss understood the process layout doesn't change anything
when you copy in layout it invents new net names, then you copy in schematic and it invents new net names
it just so happens they invent the same names so when you turn on back annotation it is correct except for the names that should stay the same for all copies
-Lasse
You could save tons by switching to Multisim/Ultiboard; at least when I was using it back in school, it supported all that -- including the bugs!
Although I forget if they had a *multi*layer version (the Student version did 4 layers), which would be kind of a killer in your use.
Tim
-- Seven Transistor Labs Electrical Engineering Consultation Website: http://seventransistorlabs.com
snip
4 layers?Legacy Tango PCB. The bastards f***ed us for five years of support fees conveniently neglecting to tell us that they had discontinued actually supporting it.
It should be given away freely. Fuck 'em.
Great app. Written in Pascal. It would be really great to fully reverse engineer it and reproduce it with a PERL front end or such.
Great layout tool though, when it was one of the bigger players.
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