FET gate waveform

g

ts

on

I

he

T.

V

em

be

hat

s
e
p

ny

Time for a little dead-time. An r-c + diode network could do that.

-- Cheers, James Arthur

Reply to
dagmargoodboat
Loading thread data ...

There is about 100ns dead time and the gate of the bottom FET is 0V. When the top FET turns on the gate of the bottom FET rises to about 5V for about 15ns and then drops back to 0V.

We added an extra pnp pull down with schottky diode from base to emitter between the driver and FET. The 5V signal comes from the FET not the driver. Also the faster the gate rise time on the top FET the bigger the signal on the lower FET gate.

Google found a few article sto explain the issue, such as:

formatting link

So I don't believe the dead time is the issue.

Reply to
Raveninghorde

ring

y its

s

ed

a

es,

to

so

ith

s on

g.

go

ot

So

k. I

f the

the

FET.

ain

ed

ld

e 1V

.5V

ary

us

oblem

ous

a

to be

h that

sits

le.

w:

tage

g up

d

f any

e

I'm familiar with the problem but can't see the waveforms, so I thought (hoped?) the lower FET's gate mightn't have enough time to discharge fully. But, you say the low-side gate spikes up from 0v, so I'm convinced--it's Miller, not dead time.

That article you linked covers the options: slow the slew rate, stiffen the low-side driver, or split the low-side driver supply and drive the low-side FET gate negative (so the Miller spike still can't turn the FET on).

Given your external gate-driver, you could also switch low-side FETs for one with a higher Vth, or lower Cdg, or both.

The low-side drive could also be stiffened with a emitter-follower (ah, I see you did that. Did it work?), or a beefier FAN3xxx, I s'pose.

Me? I'd shop low-side FETs first, and consider slowing the high-side slew.

-- Cheers, James Arthur

Reply to
dagmargoodboat

be

that

We are modifying the board to drive the gate to -5V as shown in the article. So a 5V spike will leave the FET gate at 0V. The FET worked OK from the 6V drive of the LM3150. The FAN3100T is running on 12V so even with the gate at -5V it will turn on well at +7V.

I'm on the road tomorrow so I'll know if it solves the problem or not on Friday.

Reply to
Raveninghorde

per

during

tely its

e is

luded

to a

times,

it to

es, so

g with

tors on

ging.

and go

n not

r. So

rick. I

ys.

ETs

g of the

on the

ide FET.

again

tched

would

o be 1V

t 5.5V

o vary

rious

x

problem

bvious

see a

ars to be

with that

L5 sits

sible.

s

know:

voltage

king up

and

e if any

the

hes

V

s a

Your fix sounds solid, but the glitch bothers me--I don't like unexplained problems. The FAN3100 looks pretty husky. You'd think it'd keep the low-side FET's gate low while the common FET node slews high, Miller or no...

If the common FET node slews 1 V/nS, and the low-side FET has, say, Cdg=3D1nF, that's only an amp, which the FAN3100 should handle.

Is the gate connection tight with the driver? Inductance in that trace would explain your spike.

James Arthur

Reply to
dagmargoodboat

Driving a gate negative is very good policy but here it's a bit like sweeping the spike under the rug :-)

Some day a new batch of FETs might show some more Miller and the problem creeps back in. The FAN3100 appears to be a bit wimpy, page 6 list its output at 2.5A but at that current it only pulls down to VDD/2:

formatting link

Personally I prefer drivers with staunch CMOS outputs that really hold things down. The MIC44xx series, for example.

Careful, everyone is driving on the wrong side of the road over there :-)

--
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Reply to
Joerg

hes

V

s a

.
V

so

That might help. OTOH, his emitter-follower should've been pretty stiff. That's why I asked about trace inductance.

Any which way, Mr. Horde should have it whipped soon.

-- Cheers, James Arthur

Reply to
dagmargoodboat

Yeah, he knows his way around switchers, he'll get it going. I think the first order of the day was to get this one prototype working so it can be demo'ed, then he'd be free to re-design the thing with a better switcher chip and so on.

I almost lost this thread. I changed the newsreader roll-off from 30 days to 60 days but somehow that didn't stick :-(

--
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Reply to
Joerg

At last the dissipation is looking reasonable. 22C rise on a 10C/W heat sink for the high side FET. It was nearly 60C. I think there is another 5C to be found but that's for the next version.

The low side FET gate is -5V when the FET is off. Switching to +7V when on. This didn't completely fix it. The high side FET seems to also suffer from miller capacitance switching it on when the low side switches. So the high side FET is now held off with -4V.

These fixes meant the +12V supply feeding the FAN3100 FET drivers was current limiting so we had to beef that up.

I had a look at the specs on the Micrel parts and while they had higher drive currents than the FAN3100 I didn't spot a current drive figure for holding down the GATE at near zero. The FAN3100 has FETS across the bipolar drivers to hold down the gate turn on due to miller capacitance - obviously they are not good enough.

Reply to
Raveninghorde

Great! So I take it that the demo was a success, you could take an order for the next five million, swing by the LearJet dealer to put in an order ...

It's a popular driver chip architecture these days but often the FETs are a bit wimpy. I prefer the MIC44xx series, something with just FETs in there but lots of gusto.

--
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Reply to
Joerg

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.