FET gate waveform

It looks like the miller capacitance is driving down the gate as the FET switches on and the LM3150 lacks the drive to prevent this being an issue.

I guess the difference between prototypes is the longer turn on delay of the 2SK3704.

Could be that the substrate diode of Q3 is acting like a step-recovery diode. When Q2 turns on, the Q3 diode looks like a short for roughly

50 ns, then abruptly opens up. That will make a monster positive spike at the D3 drain. It will also cause shoot-through current that will kill efficiency.

I had a similar problem with an integrated synchronous switcher:

ftp://jjlarkin.lmi.net/SwitcherRise.JPG

You can see distinct phases:

lower fet on

lower fet off, substrate diode conducting

upper fet on, fighting substrate diode reverse conduction... lots of current is building in parasitic inductances

diode gives up, creating wicked spike

Synchronous rectifiers are often not worth the hassle at output voltages and currents like this. Try shunting Q3 with a schottky, or replacing it entirely.

John

Try putting a schottky across the lower MOSFET. Replace C23

That might help. But if the schottky drop is enough to let the PN substrate diode conduct a little, it may still snap.

John

Now don't shoot the messenger. The LM3150 has an internal regulator to

6V, of course minus the drop of the bootstrap diode, minus whatever other losses in there, see page 6:

That's a bit wimpy for a FET like this. It would be better to drive those with more gusto, like 10-12V. I will never understand why manufacturers put such lowish voltages on the gate drivers, makes no sense at all.

The Schottky MooseFet suggested is also well advised.

Next time I suggest to get a better chip where you can bypass the internal LDO and feed it some real VCC. 12V or so. LTC has some better ones there.

--
Regards, Joerg

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I've already kicked my brother in law for choosing it. I didn't check the data myself until we first had problems with a non logic level FET.

I must admit I felt this was the easy part of the job and was more concerned with the offline pre regulator.

As you say why does anyone limit the FET drive to under 6V.

Don't kick him too often, your sister might not like that :-)

Even logic-level is deceiving. Yeah, they switch alright under DC loads. But dynamically, not. Ramp-up is more sluggish, costs efficiency and some grief with heat. Then when Miller hits you have almost no reserves.

You could demonstrate the improvement if you'd roach in a bootstrappable dual driver between LM3150 and FETs. Bypass it well enough. But in the end this looks like a re-layout case :-(

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A re-layout is not a problem.

I'm just trying to get it cool enough so I can get the prototype out in the box so the customer can evaluate. Once I've got an order for a couple of hundred I can replace the LM3150 and fix the problem.

Then the only option I see other than the Schottky fix is to find the power FET with the lowest possible threshold and low enough Rdson. Problem is, most of the modern stuff is going to be borderline for Vds in your case and doesn't come in TO220 or TO247.

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Give or take a foot, the charge in the "charge storage" is proportional to the current that flowed in the last storage-time before you try to stop it. Reducing the current should make an obvious change if that is the cause of the problem.

What is the MAX voltage?

Did you look at the HUF77545S3S? It conducts a lot better with only

5V on the gate.

35V nominal in. I'm allowing 40V max.

Can't find that part number. I assume it's Fairchild. The only similar part numbers I've found so far are specified at 10V Vgs.

I put a schottky, 48CTQ060, in parallel with Q3. The waveforms looked better but the input current didn't change from 2.98A for 8A out and the temperature rise on Q2 was the same.

So I removed Q3 completely and just had the diode. The LM3150 had a fit and refused to run properly. Looking at the data sheet for the LM3150 the Rdson of the low side FET is part of the current limit calculations, so that explains why Q3 can't be omitted.

At the moment I think the diode is not the main problem. So back to looking at Q2.

Yep. This coincides with the thread on heat sinking high powered smt FETS. Bro in law chose TO220 in principle as heatsinking is "easy". But the controller chip is wimpy and needs a FET with a low gate charge. And as you say good modern stuff isn't available in through hole packages.

I may have missed something but the Rdson is only specified at 10V. And it has Qgd of 43nC which given the drive capabiltiy of the LM3150 looks too high.

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Look in the curves at the current vs drain voltage for given gate drives for the two. I think the part I gave does better.

TH leaves you with pretty slim pickings but here are a couple speced at 5 or 6 Vgs.

Since you are in dire need to get a demo prototype out, some more ideas:

You could try a snubber from Q2 source to GND. Maybe at least some of the ring-out can be muffled. It may not really boost efficiency much but at least move some dissipation away from the FETs. The snubber resistor needs to be able to stomach that. Ok, I know that is sort of a last resort sledge hammer method in this case. This paper might help a bit:

Other: Does this board have a full ground plane? If not can you kludge at least a local one around the LM3150? Is the line to the SW pin nice and fat and of low inductance? If needs to be so the bootstrap cap has something to "lean onto".

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