digital design problem

The quickest solution isn't digital.

Hook up each of the 13 binary outputs to a resistor - let's say 1k part

- and tie the free ends of the resistors together.

Assuming 5V power supplies and CMOS drivers, with 7 high inputs and six low, the common point with be at 2.692V wrt to the 0V rail. With 6 inputs high and 7 low, this falls to 2.308V.

Tie this common point to one input of a comparator, tie the other input to a 1:1 divider between the power rails, and you've got a system that will react as fast as your comparator - the LT1016 offers 9nsec typical and 15nsec worst case

Despite the description, this doesn't really qualify as an "ultrafast comparator" these days - there are ECL parts around that a ten times faster. It is one of the better behaved comparators, and digital engineers have been known to use them without provoking them into oscillation (but read the whole data sheet).

You do seem to be going about it the hard way You can either figure out the required minterms (how many combinations of 7 bits are there in 13 bits?), make AND functions and OR them together

... reg data[12:0]; wire vote; assign vote = (data[12] & data[11] & data[10] & data[9] & data[8] & data[7] & data[6]) | (data[12] & data[10] & data[9] & data[8] & data[7] & data[6] & data[5]) | ....

etc OR just use a shift register

module majorityvote(indata, out, clk, start); input [12:0] indata; // the 13 bits, latched somewhere external to this module output out; // the result input clk; // to clock things around input start; // take high to run the sequence, assumed to be externally synchronised. Take low before 13 clocks. reg [3:0] bitcount; reg [3:0] count; assign out = (count > 3'b110) ? 1 : 0;

always @(posedge clk) begin if(!start) begin count

A quick note about the minterm solution:

Although there are thousands of possibilities of 7 or more bits set, you don't care about the 'more' - if there are any 7 bits set, that's all you care about. The speed will be dictated by the propagation delays and the levels of logic needed to implement the terms. A good compiler (with lots of resources) will do that in 2 levels of logic at a minimum (1 for each and term, assuming they are all paralleled) and one for the OR term (assuming it can parallel the 7 bits - this is the one it probably can't parallel).

Cheers

PeteS

Thanks for the suggestion. I really think that this should work OK. I didn't thought of performing the computation on the fly. *blushes*

Your solution is what I needed, as the data actually comes in a serial interface. I suppose I became too single minded about doing it in a single cycle.

I needed the computation to be done in 20 ns which is the clock period of the design. My previous attemps all incurred in a delay in the range of 23 ~ 35 ns.

Thanks again. And Happy New Year!

You're probably forcing the compiler into doing some unnecessary partial results that it could otherwise optimize out. I think the first part is fine. I played around with the end part and reduced the slices from 15 to 10, LUTs from 27 to 18, levels of logic from 12 to 7 and static delay estimate from 27ns to 17ns. This is what I did:

signal threshold: integer range 5 to 6; ... with Bits_in(12) select threshold

Sure, but there's still 1716 minterms if my quickie C program was correct.

Best regards, Spehro Pefhany

Or just use the combinatorial formula,

Pick m objects out of a set of n--

n!/((n-m)!*m!) = 13!/(7!*6!) = 1716

Best regards, Spehro Pefhany

How fast/cheap can an 8K x 8 ROM (e.g., 2764-type) be had? Use all 13 bits as address, and output a high when 7 or more of the input bits are high, and so on. 8K x 1 would work - or a 1K x 8 and a 1 of 8 data selector...

Or is that what you guys are saying? ;-) (I'd have done it in schematic.)

Cheers! Rich

We're operating a level of abstraction above the schematic.

But if he can do it serially, it becomes MUCH less complex.

Best regards, Spehro Pefhany

Why not add the bits together into a four bit number, add two, and take the MSB as the over/under?. Using the Xilinx carry chains can make the addition quite fast.

Table lookup, of course.