CMOS logic level range
Maybe I'm reading it wrong, but to me the only "guaranteed" switching points are at 3.5V and 1.5V.
[snip]
Not hardly. I design in CMOS or BiCMOS every day.
Read it again. "Typ(2)" Read the note.
Believe whatever you like, you're not a significant player in this action anyway ;-)
...Jim Thompson
Since nfets are a little friskier than pfets, most cmos parts have an actual threshold a tad under half Vcc, 2.4 volts maybe for 5 volt parts. The newer parts can draw a *lot* of supply current if biased there, enough to glow on a thermal imager, easy to spot.
John
I sometimes wonder why they state "typical" specs. I guess it's a bit of a sanity check and gives one a decent idea about how the part performs in general, but depending upon them in a design wouldn't seem to be a very good idea IMO.
Of course not.
John
Sometimes there's a huge gap between typs and guaranteed limits. A kick-ass, high-profit product can result from a prudent exploitation of that gap. The extreme case is to use a high-performance part behavior that's not specified at all.
The trick is to know when to cheat, and to only do it when the risk has a corresponding payoff.
John
We are just now testing an early batch of a new VME design that we did with all 1% resistors and lowest-grade voltage references and such. Worst-case output has a calculated tolerance of something like +-15%, and we saw no pre-calibration channels even as bad as 1% out. I think that in these days of laser trimming and mature processes, most parts are a lot better than their guaranteed specs.
John
Many I/C specifications are set high enough so as to not require testing... testing time has become a major part of the cost.
What's always amused me is that the only difference between an LM339 and an LM139 is PRICE ;-)
...Jim Thompson
Of course, one in a million, if he's making 200 pieces over the life of the design, may as well be zero.
good
Try throwing a on recovery time spec and see what happens to the price! In the late '70s we were paying over $50 for that same LM339.
a
good
s/LM339/LM356/
Sorry.
I was just agreeing with you.
We did a product recently that had a 3.3 volt FPGA driving some 5-volt output buffers. The logic levels were just barely legal, but the buffers were getting hot, cute white speckles on the imager. I posted about possible level-shifter circuits to fix it. We also graphed Icc versus Vin for the buffer, and got 48 mA at about +2.4 logic in.
John
good
We did leave about 16% gain headroom so we can apply per-channel cal factors, saved in eeprom at factory cal time. But using the default calibration factors that appear at first turnon, the things are almost not worth actually calibrating.
Parts are *so* good these days. And dirt cheap.
John
good
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