CMOS logic with ground for Vdd

I'm designing an analog circuit with a regulated +/-12V supply. I want to include a 4000 series CMOS logic device to switch a sub-circuit at sub-Hz frequency.

I haven't worked out all the details but, at this stage, using ground as Vdd and -12V as Vss looks like a convenient way to go. Is there any reason why this is inadvisable? Any caveats? (Proper care will be taken to ensure that no pin will be pulled outside Vdd and Vss).

Reply to
Pimpom
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I've done this, no problems at all except make sure it's *very* clearly marked on the circuit diagram for the repair technician.

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Cheers 
Clive
Reply to
Clive Arthur

No problem. Older 4k cmos would latch up and short the supply if you transiently forward-bias an ESD diode, which gets worse at high supply voltages. Maybe watch out for that, with the unusual supplies.

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John Larkin         Highland Technology, Inc 

Science teaches us to doubt. 

  Claude Bernard
Reply to
jlarkin

Noted, and thanks. I'm not sure yet if this will go into production.

Reply to
Pimpom

Thanks.

Reply to
Pimpom

The idea of "Ground" is a ghastly human simplification that mostly serves just to make schematics not look messy but hides the real truth!

piglet

Reply to
piglet

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