1ns max jitter oscillator, cheap - for fast 4 diode sampler

A sampler time base needs to stay phase coherent to a trigger. Injection locking whacks randomly the phase. We care about time, not frequency.

It is possible to build an instant-start LC oscillator, and phase-lock it to a low phase noise XO, and preserve the original trigger timing with picosecond precision, but I can't tell how.

But Klaus can do a totally synchronous system, for TDR, so doesn't need a triggered oscillator. Could do a simple all analog ramp for the timebase.

If Klaus needs an oscillator at all, he needs many MHz. A $3 quartz crystal oscillator would have picosecond jitter. A Wein bridge wouldn't be practical at that frequency and would have ghastly phase noise.

No, NO! Buy a cheap cmos crystal oscillator with a suitable jitter spec.

otally at square one

er. RC typically have 1us of jitter (found info on the web), and a crystal oscillator, standard type probably 1ns jitter. But I think that idea was cr azy, a PLL clean up, would not work I guess.

could do many samples and average), I would guess I need jitter of 300ps (1

with low price in mind)

eflected pulse. Since I need up to 200m lenth, the maximum time from the em itted pulse to reflected is 3us. So if the jitter is slowly changing over t ime, it may be a lot less in only that time span.

I was actually going the digital way

Clean clock to drive the microcontroller that generates the TDR pulse with a HR timer

The microcontroller has picosecond timing

Page 80, 217ps

I will let that HR timer trigger the 4 diode sampler, then use slow aquisit ion to sample and store for later analysis

But, your way may be cheaper

Cheers

Klaus

otally at square one

er. RC typically have 1us of jitter (found info on the web), and a crystal oscillator, standard type probably 1ns jitter. But I think that idea was cr azy, a PLL clean up, would not work I guess.

could do many samples and average), I would guess I need jitter of 300ps (1

with low price in mind)

eflected pulse. Since I need up to 200m lenth, the maximum time from the em itted pulse to reflected is 3us. So if the jitter is slowly changing over t ime, it may be a lot less in only that time span.

That would then be a little sensitive to the DAC noise, which would cause j itter directly. But that DAC signal can be heavily filtered

I would need a linear ramp then. But in other threads you have shown more o r less how that can be done

That is sort of how they are doing the ps timebase. They use a standard tim er (16 bit or whatever), max clock of 144MHz (7ns resolution). Then they ad d a delay line, to generate the 217ps smaller intervals

Cheers

Klaus

The best timing performance requires significant stored energy, if only for Heisenberg uncertainty principles. That means LC beats RC circuitry (the resistors don't store energy, they just waste it). A rock has the full momentum of the standing wave acoustics, so a crystal is better than LC. Short of maser/resonant cavity references, the possibilities are good for plain old wires as delay lines (distributed L, C) also.

World-class timing uses superconducting cavities, if that matters.

"preserve the original trigger timing"

Sometimes folks assume we're all intimately familiar with the requirements of the projects they're working on ("I'm working on my...") sadly I'm not, sure would make my life easier if that crystal ball were up and running. Not even sure if requirement is sine or square.

Analog Devices likes the injection-locked Wien bridge for low phase noise, low distortion sines but at say, 10kHz. Down there the performance of that lash-up does look amazing.

There's another thread about a 1ns sampling stage which details that I am working on a ns sample hold, that will be used for a cheap TDR function

Cheers

Klaus

Alone the fact that you can easily injection lock a Wien bridge oscillator is a sure sign that its frequency stability is not of prime quality. And the absence of harmonics has nothing to do with phase noise, as long as their amplitude is not that large that it causes high order sideband mixdown to baseband. (noise present around harmonics). You can have a square wave with excellent phase noise.

Injection locking also does not solve any problem. If your injection source is so good, why not use it directly, without all of this ado?

And if you look at the Leeson equation that defines the phase noise of an oscillator, there is a division term of (2 * Q**2), so Q is one of the most important parameters. In practical oscillators that can be even stronger than **2, depending on offset. The Leeson formula is somewhat simplified. Rohde, Rubiola and others have improved on that.

Remember that the phase slope of the loop gain is effective Q. dphase/dfreq of a Wien bridge is, oh, ask LTspice. The wet sand bag. Good is different. Oscillation frequency is where phase goes through 0, so Q = dphase / dfreq at this frequency is that what counts.

Jitter is phase noise integrated over all frequencies of interest. That works in the other direction, too, but there are more degrees of freedom, i.e the noise distribution close to / far from the carrier.

And for telecom applications, the frequencies of interest do not include anything below 12 KHz. That's how most stuff is specc'ed because it gives better numbers. 1/f noise is ugly.

You probably cannot afford that luxury of neglecting 1/f because you need absolute flight time, but if your laser link has GHz subcarriers, then that's OK.

There is a German web site with a calculator: phase noise -- jitter but here it's well after midnight, so I won't search it now. Maybe tomorrow.

As I wrote more than once here: timenuts group at febo.com, and

The HP 54750A scope contains a time stretcher (dual slope: charge fast, discharge slowly). It has been described in HP Journal. It is even 2-stage to get more traces per second. I must admit that I love that scope. And everybody should have the HP journals in their vault.

This dual slope procedure is not uncommon. I have done something similar to compare a hydrogen maser and a cesium. 5 ps resolution with somewhat worse accuracy have been reached at many places. That's about what a Stanford 620 time interval counter delivers. Good instrument.

cheers, Gerhard

...and its a Wien bridge, not Wein. Also, it's not Seimens. The creator of the bridge was Wien by name; he has his name probably from the the town called Vienna abroad. Also the sausages are not Weiners but Wieners, even if from Oscar Mayer; but methinks in Vienna they call them Frankfurter.

I wished I was an Oscar Meyer Weiner, because if I was an Oscar Meyer weiner, everybody would love me.

You're showing your misunderstanding of Wurst is only eclipsed by your misunderstanding of electronics.

Dream on.

It was entirely unclear to me whether OP was looking for a timebase oscillator or a test oscillator for the sampler! to measure the performance of the sampler with a signal. I guess the part about RC oscillator threw me - why would you use an RC oscillator for a sampling timebase.....?????

In any case there's nothing intrinsically high phase noise about the Wien bridge topology or injection locking. it all depends on the implementation....

There's nothing intrinsic about the poor, besmirched Wien bridge oscillator topology that makes it intrinsically low Q, intrinsically high phase noise, or any of these scurrilous accusations against it! And the topology is already used in ICs to generate accurate sampling clocks, as a matter-of-fact. Do they usually put inductors in ICs?

Injection of phase adjustments doesn't cause phase noise? Tell us another joke, please...

Are you hoping for -infinity dBc? No indeed you can't have that sorry

So you count cycles until you reach the desired time, then start a fast ramp to set the vernier delay. How you measure the vernier delay time?

I'd be skeptical of the jitter. Resolution is cheap. A lot is going on in a uP chip.

Here's a cheap semi-linear ramp delay:

Making two ranges would't be hard. Switch the cap or the charging current.

Duh. But start with high Q (low phase noise, low resistance->Johnson noise, LC not RC) and you need smaller kicks to injection lock. Varicap tuning to reduce the frequency deviation would also allow smaller injections - you could still use a phase detector to PLL the tuning.