ring oscillator

I've never really understood ring oscillators, and I still don't.

Startup is interesting. After the power supply comes up, the stages are identical, fully symmetric, and all the nodes hang at +2 volts.

It meditates on that for about 70 ns, and then everything scatters and it soon settles down to a nice 26 MHz oscillation. The oscillation period is 5 times the sum of a stage Tpd_rise + Tpd_fall.

Version 4 SHEET 1 2324 680 WIRE 1760 -176 -256 -176 WIRE -32 -48 -64 -48 WIRE 0 -48 -32 -48 WIRE 384 -48 352 -48 WIRE 416 -48 384 -48 WIRE 800 -48 768 -48 WIRE 832 -48 800 -48 WIRE 1216 -48 1184 -48 WIRE 1248 -48 1216 -48 WIRE 1632 -48 1600 -48 WIRE 1664 -48 1632 -48 WIRE -64 0 -64 -48 WIRE 352 0 352 -48 WIRE 768 0 768 -48 WIRE 1184 0 1184 -48 WIRE 1600 0 1600 -48 WIRE -112 16 -160 16 WIRE 304 16 256 16 WIRE 720 16 672 16 WIRE 1136 16 1088 16 WIRE 1552 16 1504 16 WIRE 1968 96 1920 96 WIRE 2016 96 1968 96 WIRE -256 128 -256 -176 WIRE -160 128 -160 16 WIRE -160 128 -256 128 WIRE -64 128 -64 96 WIRE 80 128 -64 128 WIRE 128 128 80 128 WIRE 256 128 256 16 WIRE 256 128 128 128 WIRE 352 128 352 96 WIRE 496 128 352 128 WIRE 544 128 496 128 WIRE 672 128 672 16 WIRE 672 128 544 128 WIRE 768 128 768 96 WIRE 896 128 768 128 WIRE 960 128 896 128 WIRE 1088 128 1088 16 WIRE 1088 128 960 128 WIRE 1184 128 1184 96 WIRE 1328 128 1184 128 WIRE 1376 128 1328 128 WIRE 1504 128 1504 16 WIRE 1504 128 1376 128 WIRE 1600 128 1600 96 WIRE 1696 128 1600 128 WIRE 1760 128 1760 -176 WIRE 1760 128 1696 128 WIRE 1920 160 1920 96 WIRE -64 176 -64 128 WIRE 352 176 352 128 WIRE 768 176 768 128 WIRE 1184 176 1184 128 WIRE 1600 176 1600 128 WIRE 128 192 128 128 WIRE 544 192 544 128 WIRE 960 192 960 128 WIRE 1376 192 1376 128 WIRE 1760 192 1760 128 WIRE -160 256 -160 128 WIRE -112 256 -160 256 WIRE 256 256 256 128 WIRE 304 256 256 256 WIRE 672 256 672 128 WIRE 720 256 672 256 WIRE 1088 256 1088 128 WIRE 1136 256 1088 256 WIRE 1504 256 1504 128 WIRE 1552 256 1504 256 WIRE -64 304 -64 272 WIRE 128 304 128 256 WIRE 352 304 352 272 WIRE 544 304 544 256 WIRE 768 304 768 272 WIRE 960 304 960 256 WIRE 1184 304 1184 272 WIRE 1376 304 1376 256 WIRE 1600 304 1600 272 WIRE 1760 304 1760 256 WIRE 1920 304 1920 240 FLAG -64 304 0 FLAG -32 -48 V+ FLAG 352 304 0 FLAG 384 -48 V+ FLAG 768 304 0 FLAG 800 -48 V+ FLAG 1184 304 0 FLAG 1216 -48 V+ FLAG 1600 304 0 FLAG 1632 -48 V+ FLAG 1920 304 0 FLAG 1968 96 V+ FLAG 128 304 0 FLAG 544 304 0 FLAG 960 304 0 FLAG 1376 304 0 FLAG 80 128 1 FLAG 496 128 2 FLAG 896 128 3 FLAG 1328 128 4 FLAG 1696 128 5 FLAG 1760 304 0 SYMBOL nmos -112 176 R0 WINDOW 0 94 25 Left 2 WINDOW 3 72 66 Left 2 SYMATTR InstName M1 SYMATTR Value BSS123 SYMBOL pmos -112 96 M180 WINDOW 0 93 90 Left 2 WINDOW 3 78 49 Left 2 SYMATTR InstName M2 SYMATTR Value BSS84 SYMBOL nmos 304 176 R0 WINDOW 0 94 25 Left 2 WINDOW 3 72 66 Left 2 SYMATTR InstName M3 SYMATTR Value BSS123 SYMBOL pmos 304 96 M180 WINDOW 0 93 90 Left 2 WINDOW 3 78 49 Left 2 SYMATTR InstName M4 SYMATTR Value BSS84 SYMBOL nmos 720 176 R0 WINDOW 0 94 25 Left 2 WINDOW 3 72 66 Left 2 SYMATTR InstName M5 SYMATTR Value BSS123 SYMBOL pmos 720 96 M180 WINDOW 0 93 90 Left 2 WINDOW 3 78 49 Left 2 SYMATTR InstName M6 SYMATTR Value BSS84 SYMBOL nmos 1136 176 R0 WINDOW 0 94 25 Left 2 WINDOW 3 72 66 Left 2 SYMATTR InstName M7 SYMATTR Value BSS123 SYMBOL pmos 1136 96 M180 WINDOW 0 93 90 Left 2 WINDOW 3 78 49 Left 2 SYMATTR InstName M8 SYMATTR Value BSS84 SYMBOL nmos 1552 176 R0 WINDOW 0 94 25 Left 2 WINDOW 3 72 66 Left 2 SYMATTR InstName M9 SYMATTR Value BSS123 SYMBOL pmos 1552 96 M180 WINDOW 0 93 90 Left 2 WINDOW 3 78 49 Left 2 SYMATTR InstName M10 SYMATTR Value BSS84 SYMBOL voltage 1920 144 R0 WINDOW 0 68 72 Left 2 WINDOW 3 31 120 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value PULSE(0 5 100n 1n 1n) SYMBOL cap 112 192 R0 WINDOW 0 54 18 Left 2 WINDOW 3 48 56 Left 2 SYMATTR InstName C1 SYMATTR Value 10p SYMBOL cap 528 192 R0 WINDOW 0 56 15 Left 2 WINDOW 3 52 56 Left 2 SYMATTR InstName C2 SYMATTR Value 10p SYMBOL cap 944 192 R0 WINDOW 0 61 17 Left 2 WINDOW 3 50 54 Left 2 SYMATTR InstName C3 SYMATTR Value 10p SYMBOL cap 1360 192 R0 WINDOW 0 55 15 Left 2 WINDOW 3 55 55 Left 2 SYMATTR InstName C4 SYMATTR Value 10p SYMBOL cap 1744 192 R0 WINDOW 0 55 15 Left 2 WINDOW 3 55 55 Left 2 SYMATTR InstName C5 SYMATTR Value 10p TEXT 1920 -24 Left 2 !.tran 0 1u 0 10p TEXT 1904 -136 Left 2 ;RING OSCILLATOR TEXT 1912 -96 Left 2 ;JL Sep 24, 2016

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
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John Larkin
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Looks almost like one of those phase shift oscillators of the past that had only one gain stage but what could be called a multiple pi filter to get it to 180 degrees at a certain frequency. Haven't seen them used.

But they used resistors and capacitors and that set the frequency. there seem to be no resistors here. So the switching time of the FETs is in the equation ? I consider that flaky.

Or maybe it could be described as a ring counter with all astable and inverting flipflops. Hard to say.

Unless a bunch of components are missing for clarity. If so, didn't work.

Plus I wonder the application. for a ring counter I can envision a few, but for this not so much. Loading would affect the frequency and maybe even stall the thing, depending.

Have you seen this thing used in something ? If so, what ?

Reply to
jurb6006

QM?

Reply to
Tom Del Rosso

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In a real-life oscillator, thermal noise starts to be amplified in the loop, and the oscillation builds up until the active stages go limiting.

There is enough numerical round-off noise to do the task of thermal noise in the simulated oscillator.

You do not need five stages - three stages are ringing at 42 MHz.

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-TV
Reply to
Tauno Voipio

Wiki talks about them.

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They are used as on-chip oscillators, in PLLs. A lot of ring oscillators on a chip can be the core of a random number generator.

I've built them inside FPGAs to measure chip temperature, to experiment with heat sinking.

Picosecond time-interval counters sometimes use a ring oscillator and a latch.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
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John Larkin

Whoa. Practical uses for ring oscillators. I thought that they were just something that semiconductor guys used to quantify the speed capabilities of a process.

So, if you build a processor and run it from a ring oscillator, can you reliably set up the chip so that if the oscillator is going as fast as it can for that hunk of silicon and that temperature, voltage, etc., then the chip as a whole will be going as fast as it reliably can?

I could see how having a processor that just goes as fast is it can (when it's going at all) could be advantageous, in some situations.

Clearly if you were going to have such a beast _talk_ to the outside world it'd need some reliably constant clock.

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Tim Wescott 
Control systems, embedded software and circuit design 
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Reply to
Tim Wescott

How do you keep a ring oscillator from doubling, with two peaks chasing each other around the circle? Just by limiting the number of stages?

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Tim Wescott 
Control systems, embedded software and circuit design 
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Reply to
Tim Wescott

Welcome to the world of chaotic mathematics!

IMHO, in a three-element ring, there is not enough space for the extra peak.

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-TV
Reply to
Tauno Voipio

Makes sense; adapt the clock to the temperature. A cold chip can run faster.

Does anybody know how stable on-chip oscillators work?

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
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Reply to
John Larkin

That's what has always interested me. There should be multiple modes, but a ring oscillator quickly settles down to the lowest frequency mode.

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John Larkin         Highland Technology, Inc 

lunatic fringe electronics
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John Larkin

Speed set by on chip RC with the R trimmed by laser if you want decent accuracy. It still varies with temperature. How would you compensate the temperature effects? I believe some have done it to some extent. There are MCUs with internal oscillators accurate enough to run a UART

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Rick C
Reply to
rickman

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using an rcr oscillator like this?:

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-Lasse

Reply to
Lasse Langwadt Christensen

Funny you mention that. There is a multi-core processor with 144 CPUs each running at it's own speed with variable delays for different instructions (700 MIPS peak per processor). So they are all async to each other and the rest of the world. On chip comms uses a hand shake with the option of stopping the processor while waiting for a reply, great for some work (no intention of optimizing the instruction rate on all processors, rather treating CPU cycles as any other non-precious resource).

The trick is interfacing to a real time world. If you want a UART, the CPU has to count cycles to measure a bit time and thereafter sync in order to adjust for temp changes. I'm not sure I've seen an implementation that does this fully.

Other, synchronous interfaces require either a handshake or an external clock which the interface CPUs then sync to. The rest of the chip syncs to the I/O by the internal handshakes if needed.

This is a *very* hard chip to use because of this and a number of other reasons.

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Rick C
Reply to
rickman

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I think I've seen someone use it as VCO by varying the supply

-Lasse

Reply to
Lasse Langwadt Christensen

Something is rotten in Denmark.

"This RC oscillator is, to a first-order, insensitive to variations in Vcc, input threshold, and thus temperature."

I don't see how this is correct. The timing of the circuit is determined by the RC constant and the threshold of the input on the lower feedback path. If the R were internal the chip temperature would drive the resistance and so the RC time constant. The input threshold voltage determines where on the RC slope the buffer will switch. So this seems very bogus to me. Even with an external RC, the R will vary with temp unless you take steps to eliminate that.

I don't even see how the circuit is insensitive to changes in Vcc since the input threshold is a percentage of Vcc for CMOS devices, no? Am I missing something important?

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Rick C
Reply to
rickman

The lowest mode generates the longest saturation phases, so the other modes dissipate , starved of gain.

Reply to
whit3rd

One stage of the ring oscillator should have a bigger capacitance than the rest so start up is more certain.

Reply to
Alan Folmsbee

If the timing R and C are constant,

and the R is driven to either VCC or ground,

and the oscillator thresholds are held at a constant ratio to VCC

then the oscillator frequency is constant -- as VCC goes down the thresholds get closer, but the RC filter is being driven so it all comes out in the wash.

NE555s are like this. But if you go and change VCC at some significant fraction of the oscillator frequency -- then screwy things happen.

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Tim Wescott 
Control systems, embedded software and circuit design 
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Tim Wescott

I've heard about that chip, even looked at the website a bit. Looked like the speed increase wasn't necessarily worth the oddball-ness.

Maybe they need to revive Occam as a programming language.

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Tim Wescott 
Control systems, embedded software and circuit design 
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Tim Wescott

Ok, yes, it is not sensitive to Vcc changes if they are slow. But R is

*not* constant with temperature, so that is a source of error. Is input threshold constant with temp? How does that work?
--

Rick C
Reply to
rickman

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