regarding power and timing

I have some doubts

1)consider FPGA cyclone device with I/O voltage 3.3 V, core Voltage 1.5 V,. output current set to 24mA or 4 mA I/O standard set to LVTTL or SSTL-3 or etc The operating frequency of core inside FPGA is 2 MHz Whether it depends on how many pins of FPGA we used for The logic gates used for core inside is 10000 LEs

If any data is wrong,sorry for that Incase of Xilinx FPGA ,does it depends on auxiliary voltages If we my doubt seems to be silly so. How to calculate the power consumption.. Kindly clarify

2) I have a board with FPGA core 2 MHz.MCU(its an asic ) operating at 24 MHz.If anyone asks how much frequency does this board operates at.How to find out overall set up time and holdtime(if it is applicable).