Regarding FPGA

Hi All,

I am good in Digital System design with Verilog and VHDL Coding. But I never implemented myself any design on FPGA. Now I am trying to learn myself the issues related to FPGA implementation.

So I would like to know what are the important topics I need to learn..especially implementation issues like configuring your FPGA for the respective Board environments, configuring I/O's etc. As I have a Spartan board with Xilinx tool, I would like to learn all the issues related to implementation.

So Please help regarding this...

Thanks.

Best Regards, VLSI Student

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vlsi-student
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Hi Sharan, Welcome to the gentle world of FPGAs.

If your efforts to date have been targetted towards ASICs, the overall flow is the same. Specification, design, coding, test benches, simulation, implementation, simulation, verification.

Some things that can be quite problematic in ASIC design, have easier solutions in FPGA land. Clock and power distribution inside the chip are done, and have been done by experts, so these are typically better than what an ASIC designer achieves.

Also, there are some features in FPGAs that are a major challenge in ASICs, or are the bleeding edge. In FPGAs they are just part of the chip. Examples include DLL/DCM/PLL, DCI, Dual Port memories, Multipliers, High speed serial (SerDes), Soft and Hard CPU IP.

A major part of ASIC design is adding support for manufacturing test, (as opposed to verifying your design intent). This is un-needed with FPGAs, as they are fully tested before you get them (except for anti-fuse products).

The best thing is to just get started with the examples and tutorials from Xilinx.

As for I/O configuration, such as selecting I/O standards, you need to read the documents on the chips that the FPGA connects to, and then select the appropriate mode in the FPGA. When there are multiple choices for outputs, I recommend selecting the lowest drive strength, lowest voltage swing, and slowest edge rate, that still meets the needs of the destination. This leads to lower system noise.

Hope this gets you started in the right direction.

Philip

=================== Philip Freidin snipped-for-privacy@fpga-faq.com Host for

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Philip Freidin

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