I have set up a ILA and ICON core in my design and connected them together as required.
When I run Chipscope Analyzer it finds the core and allows me to set up the trigger.
The trigger is 8 bits of which the top 3 bits are unused (so in my VHDL I have tied them to 0), data to capture is set to the same as the trigger.
When I capture some data I have unexpected activity on my signals, including the 3 bits that are tied to 0 in the VHDL!!!
How is it possible to see activity on the top 3 bits of the trigger/data when they are tied to 0? Obviously now I have no faith in the signals that are attached to the other 5 bits of the trigger/data.
Anyone else experienced this?
Cheers
Simon