A new FPGA company comes out of Stealth mode - SiliconBlue

There is an article on them in FPGA journal:

I have looked at their website and it seems that they are not ready for a lot of small customers at this time (no sales office or distributor listings). My guess is that their continued success is based on their ability to land designs in high-volume consumer handheld devices.

By the way, the FPGA Journal article seems to imply that the OTP non-volatile memory can hold more than one configuration. The datasheet does not bear this out.

Cheers, Gabor

Perhaps they will take on some more, now that Xilinx is laying off staff. 8-)

Leon

Leon,

Seriously, it is an opportunity for any company in the FPGA/PLD business (no joke here).

If you are expert in FPGA design, test, verification, programming (anything), then there is not a lot of places where you could go that would use all of your skills.

As long as they honor their agreement not to disclose proprietary or confidential information, then they are OK to go...

It may seem odd, but we have employees who have gone to another FPGA company, and then come back. Sometimes more than once!

Aust> >> Gabor,

That reminds me of the old Volvo commercial where the guy is talking to his neighbor about the new Volvo he bought. The neighbor says about his own car (some American Belchfire 2000 type thing), "I've bought 12 of them in the last 18 years! If they weren't so good, why would I buy so many?"

Rick

The datasheet states, they use on-chip flash to store the bitstream and configure SRAM from this flash. AFAIK is this similar to Lattice FPGAs. The power consumption seems to me very impressive. I wonder, if the numbers are usable for real designs. It might be interesting to here someone independend comparing Actel Iglooplus and Lattice against this technology.

bye Thomas

Might be some models only ?

It's a simple trade off, if the die-area of memory is really as small as their graphics indicate, then you can mitigate part of OTP drawbacks, by allowing (eg) TWICE the config. (plus you also cover other uses, like Test modes, or country-modes etc)

Be interesting to see their Device Program times, AND their OTP memory Yields (that's another OTP drawback: yield < 100%).

Even in Microcontrollers, companies like Silabs are releasing OTP variants, at sigificantly lower prices than flash. That suggests either the FAB, or TESTING, (or both) costs are quite large.

-jg

There was something in one of the trade mags this week about this - they claim the OTP uses 2% of the die - I think it was a TSMC process called something like oxide disruption

The big selling point appears to be low power draw - tens of uA at 32KHz and a

[snip]

FULL DISCLOSURE: We've had access to the iCE65 devices and iCECUBE design tools since about February because we worked on a few aspects of the evaluation kit and on both the data sheet and evaluation kit user guide. We were compensated for the opportunity so I'm not completely impartial.

I worked primarily with the alpha and beta releases, mostly on Linux although there is a Windows version available now. All of my work used the iCEman65 evaluation kit which includes the iCE65L04 device with about 3,500 logic cells and 80Kbits on it. I can compile most VHDL and Verilog code without too much effort because the iCECUBE tools are based around the Magma BlastFPGA synthesis package. The architecture is a traditional 4-input look-up table although the block RAM and carry logic is slightly different, likely to reduce power consumption. Run times on the beta versions weren't as peppy as I'd hoped, but they weren't obnoxiously slow either. The floor planner works but could still use a little more sophistication. I was running the betae Linux version under VMware on a Vista laptop. The beta version was certainly no worse than some of the production software we use.

The iCE65L04 part on the evaluation board exclusively loads from SPI Flash or can be downloaded. The part on the board doesn't have the Nonvolatile Configuration Memory (NVCM) in it. The board is powered over USB and you can program the SPI Flash and iCE65 device over USB.

The low-power nature of the parts are truely amazing. I don't know how many times I thought I blew a fuse because there was no current flowing to the board (okay, there actually was current flowing but the analog meter on my cheap bench supply has too wide a range to see it). I had to keep reminding myself that at 32 KHz, the _active_ power consumption is below 50 uA. With a good quality multimeter, I only measured about 27 uA, but that's for a single part at room temperature, nominal voltage). But hey, that's a good two to three orders of magnitude smaller than the _static_ power on the other devices we normally use. The 27 uA didn't require any special standby modes--that's active power at 32 KHz! I also did a few projects that ran at

32 MHz, which is included on the board, and at 19.2 MHz. Both were about 75-80% full designs that consumed 11 mA and 6 mA active current respectively on the 1.2V supply. That's without power optimizing the design. The great thing about the part is that if something doesn't move, it doesn't burn power so power-aware design really pays off as well. I haven't tried speed stressing the part yet either but the 32 MHz design had plenty of margin. Most of the low-power projects we do use the lowest clock rate possible in order to minimize power.

In terms of I/O, there are four different I/O banks (five if you include the SPI bank, which has its own supply input). Three of the banks support 3.3,

2.5, or 1.8V LVMCOS I/O and are even 5V-input tolerant. One of the banks skips the 3.3V LVCMOS standard but adds SSTL25, SSTL18, and LVDS I/O while keeping 2.5 and 1.8V LVCMOS. Each bank also has an input-disable and you can individually control which inputs are controlled by the disable. This keeps external switching from causing unnecessary power consumption.

In terms of samples, I know that the iCE65L04 is available in both the

284-ball 0.5 mm BGA and in the 132-ball 0.5 mm BGA. There's a button the front page of the SiliconBlue web site to request samples.

-- Steve Knapp Prevailing Technology, Inc.

[snip]

The on-chip memory is something that SiliconBlue calls Nonvolatile Configuraiton Memory (NVCM). It's nonvolatile like Flash but doesn't require any special processing or extra metal layers. It's based on the technology they acquired from Kilopass. The advantage for SiliconBlue is that they're already on a 65 nm process. Most programmable logic parts that use Flash are typically back a few generations because of the special processing and qualification necessary. If I remember correctly, the Lattice parts are Flash based. Both technologies have the pros and cons.

-- Steve Knapp Prevailing Technology, Inc.

....

Thanks, this is pretty interesting. A quick question, can the PLLs be reconfigured dynamically?

Tommy

[snip]

The iCE65 parts don't have a PLL, probably due to the extra power consumption. For the projects that I've been working on, a PLL would be nice, but I've been able to implement a lower-power solution in logic.

-- Steve Knapp Prevailing Technology, Inc.

[snip]

If I understand correctly, the nonvolatile memory stores a single image. You can store multiple images if you use an SPI PROM.

-- Steve Knapp