Hello,
In the version of partial reconfiguration tools for ISE 9.1i SP2, Xilinx released several reference designs using the ML403 board which includes a virtex4 FPGA. I tryed to implement the lab3 that uses HWICAP for partial reconfiguration of Virtex4.
I'm using EDK 9.1.02. However, when implementing this lab form scratch, I got errrors when starting the command "Build All User Applications". Xilinx also provided the solution files for each labs. When I tried to open the file system.xmp from the solution files for lab3 I was unable to open it. I got the following error:
ERROR:Portability:90 - Command line error: Unexpected argument[2] "Reconf" found.
Does anyone know something about this? or Has anybody implemented any of the PR Flow Design Examples Using ML403 and HWICAP?
Thanks in advance.