Field-Programmable Gate Arrays

  1. Home
  2. Field-Programmable Gate Arrays
15254 Threads Posts
to

Worth reading in Field-Programmable Gate Arrays

Problems installing windrvr.o in Red Hat EL3...

I run into a problem when I 'make;make install' the linuxdrivers.tgz file from Xilinx. Any solutions? I've read about 2....
2 comments posted 21yrs
posted by SantaBarbara350Z
2 comments posted 21yrs posted by SantaBarbara350Z

Fastest way to compute floating point log and exp

I'm looking at the fastest way to compute floating point (32bit) log and exp on an FPGA (Stratix II or Virtex 4). It mu...
8 comments posted 21yrs
posted by Marc.Battyani
8 comments posted 21yrs posted by Marc.Battyani

Update contacts at Altera

Moro Back from a successful trip in .ch I have to change my contact details at Altera and they provide an email address...
4 comments posted 21yrs
posted by me
4 comments posted 21yrs posted by me

Transfert data to Memec Virtex II Pro Card from PC

Hello all, Does anyone around here has ever transfer data from PC to Memec card using Virtex II FPGA? If yes, could you...
2 comments posted 21yrs
posted by jacques77
2 comments posted 21yrs posted by jacques77

parallel optic availability

Slightly off-topic post: I am looking for parallel optic (12-way) transmitter and receiver at ~2.7Gbps, to use with xil...
3 comments posted 21yrs
posted by tgrassi
3 comments posted 21yrs posted by tgrassi

Overmapped

Hi all, I'm using a Spartan 3 test board with a xc3s200 fpga. Before, I used a larger device (Virtex II ) and had no pr...
1 comments posted 21yrs
posted by holzi_stefan
1 comments posted 21yrs posted by holzi_stefan

Place Error

Hi, I am trying to implement the Opencores PCI Bridge on a MEMEC 2s200 Spartan II. When I synthezise using a .UCF file...
1 comments posted 21yrs
posted by jtrabal
1 comments posted 21yrs posted by jtrabal

What a nice day for XLNX

Cheers with all lucky guys who loaded XLNX yesterday. Thanks XLNX, for your products and earnings. GO GO GO XLNX!!!
1 comments posted 21yrs
posted by ituspamin
1 comments posted 21yrs posted by ituspamin

verilog to blif(lut)

Hi All, Can anyone suggest a method to convert verilog file into blif (LUT) format. Does altera or xilinx support this f...
8 comments posted 21yrs
posted by k.najeeb
8 comments posted 21yrs posted by k.najeeb

Xilinx software update?

Using 6.1.03i. Pondering whether or not to spend the money to update to latest revision. The devices we are using are f...
7 comments posted 21yrs
posted by 0_0_0_0_
7 comments posted 21yrs posted by 0_0_0_0_

DDR SDRAM on ML401

Has anyone activated this yet? i found this ddr controller on the xilinx website: memory interface generator (MIG). it...
3 comments posted 21yrs
posted by n_uzunovic
3 comments posted 21yrs posted by n_uzunovic

Does anyone have a NIOS Ethernet Development Kit?

My company is attempting to produce a secure switch based on the Altera Stratix II (EP2S60) board. Unfortunatley, Alter...
3 comments posted 21yrs
posted by brentkucera
3 comments posted 21yrs posted by brentkucera

Heat Sink for Stratix

Hi, Is there anybody who have utilized a heat sink for stratix FPGA I need a thermal resistance less than 6°C/W because...
0 comments posted 21yrs
posted by patrick.melet
0 comments posted 21yrs posted by patrick.melet