Field-Programmable Gate Arrays

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PCI arbiter (doubt in REQ signal)

Hi all, I have got a doubt in PCI arbiter operation . Assume that a particular device issues a REQ(REQ0) and GRANT(GRAN...
1 comments posted 20yrs
posted by praveen.kantharajapura
1 comments posted 20yrs posted by praveen.kantharajapura

How much do you trust your CAD Program?

OK, I just have to vent a bit. I am laying out a board with an XC9536. The schematic capture program I am using is a ma...
7 comments posted 20yrs
posted by cdsmith69NOSPAM
7 comments posted 20yrs posted by cdsmith69NOSPAM

How to NON_CLK pin that messes my clock

Hi all, I tried to find the information in Xilinx documentation and Internet with no luck. I come here as my last resor...
12 comments posted 20yrs
posted by kasty.jose
12 comments posted 20yrs posted by kasty.jose

data2bram and coregen

Hi, Does anyone have a hint on how to get data2bram and coregen memory to work together? I have an SoC with some 32bit...
6 comments posted 20yrs
posted by langwadt
6 comments posted 20yrs posted by langwadt

EDK 8.1

When can we expect an EDK that corresponds to the newest ISE release?
1 comments posted 20yrs
posted by emh203
1 comments posted 20yrs posted by emh203

where to find the bfm files?

I am designing an ata interface then I need a bfm files of ata device to simulate,and the device must support the ultra...
0 comments posted 20yrs
posted by bjzhangwn
0 comments posted 20yrs posted by bjzhangwn

FPGA interface to FLASH

Helo all: I'm uning an FPGA with a IP processor and it has an interface to INTEL and AMD FLASH devices. Both these devi...
3 comments posted 20yrs
posted by gfm5050
3 comments posted 20yrs posted by gfm5050

clock generation with DOPPLER shift

Dear experts in this newsgroup, in my diploma thesis i'm using a FPGA for baseband signal generation. I'm interested in...
10 comments posted 20yrs
posted by Ben.Marpe
10 comments posted 20yrs posted by Ben.Marpe

ISE8.1 on Linux, first impressions

I just installed ISE 8.1 on Linux and these are my first impressions: * Project Navigator finally feels like a native L...
18 comments posted 20yrs
posted by ehliar-nospam
18 comments posted 20yrs posted by ehliar-nospam

xilmfs on flash

Hello all, I am using Xilinx fpga in my project. The board is ML403 and it contains an 8MB flash. I need to store few d...
6 comments posted 20yrs
posted by rajashekar_798
6 comments posted 20yrs posted by rajashekar_798

Selling Microblaze based Machines

Hallo, I'm developing a system based on microblaze, some EDK cores and some custom cores. If I plan to sell it, I must p...
5 comments posted 20yrs
posted by marc
5 comments posted 20yrs posted by marc

Data2Mem with CRC for Virtex FPGAs

I have configured an XCV1000 as a data and instruction cache. It is connected to a external hard core. I would like to...
5 comments posted 20yrs
posted by johnd
5 comments posted 20yrs posted by johnd

TL16C550CIFN

Hi,Is there anybody who have used the device TL16C550CIFN?I want to know this device whether can work in DMA mode 1. Tel...
2 comments posted 20yrs
posted by wuyi316904
2 comments posted 20yrs posted by wuyi316904

Raggedstone specifications ...

hi all, I look the spec of the raggestone board, and i have a few questions : - which boards are currently available fo...
24 comments posted 20yrs
posted by xavier.tastet
24 comments posted 20yrs posted by xavier.tastet