Raggedstone specifications ...

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John will answer some of the questions, but for the PCI part as of special agreement Enterpoint can bundle our Ebook "DIY Logic Analyzer" with the Raggestone sales (no extra payments) with the book resources is also a PCI connected logic analyzer ip core that can be used as starting point for developing testing PCI on the RS1 board

the onboard JTAG is Cable IV 2mm header so if you use some 3rd party programmer with 2.5mm or flying wires then you need an adapter to the

2mm connector

Antti

Great news for the pci starting point which could be very interesting :) In this ip core we can connect external data bus to the board to monitor it, or it monitors the pci bus itself ?

I check my digilent cable, and the pin assignement is not the same, some adaptation will be easy to do. X.

Xavier

Raggedstone1 comes free with a programming cable PROG2.

The mode pins are connected together and go through a 0R resistor to 0V so not easy to change.

Boards that are now available for the DIL headers:

ADC_AD7927 200KHZ - 16 channel ADC based on Analog Devices AD7927 RS232 RS485 PS2 - Mouse and keyboard LED Array LED 4 Digit LED Dot Matrix USB1.1 - Interface only (core needs to be implemented in FPGA)

LVDS oscillator module (0.6 inch DIL) - Being tested shortly available assuming ok. Capable of going to 700MHz although I don't the Spartan-3 will like it that high.

There isn't a RAM board yet but there is a slowish 4MBit RAM chip that will fit the DIL on the LHS. A RAM module is being looked at and coming soon.

We are waiting for some faceplate/cable assemblies for some of these so stock is a bit patchy at present. This status should improve within the next few weeks and after that I expect them to be fully available.

Coming in the next batch are Ethernet Phy, IDE, Video Codec, 5V tolerant I/O to name a few. I don't have the full list with me so those are just the ones I can remember. These should be available in 4-8 week time frame assuming no design issues.

PCI Core - The Xilinx core works with our board and Jungo supply drivers for that core. Not free I'm afraid. I believe at least one of our customers has got the opencores PCI working as well. I don't know the driver status on this core. We have not tried it so I can't comment further. We are also at the testing stage on our own native PCI/OPB Bridge Interface and a driver for XP is being written for it. Linux to follow. A limited version/license will be offered free with Raggedstone1 when we are happy with it's performance. Higher feature level versions will be available too at an extra cost but low usage licenses won't be too expensive.

John Adair Enterpoint Ltd. - Exhibiting at DATE2006.

Don't need to do it see my other post. If you real want to use then Digilent cable then we have an adaptor module for 6x1 digilent style or if you want to make a board with a 6x1 2mm that too. We have it for our Broaddown2/MINI-CAN products that use 6x1 heads.

John Adair Enterpoint Ltd. - Some to be home of Broaddown4. The Ultimate Virtex-4 PCI-E Development Board.

john, I've just check the jungo website ans they said : "In Linux and Windows CE versions - Driver is operational for 60 minutes after re-starting it." about the free windriver. the full driver is about 800 $... snif snif :'( I'll carrefully check the website during the next week :) thanks, Xavier.

I'm interested in using your board with a PCI core as well. Is the Jungo driver needed only for programming? (ie. if I program with the cable, I don't need the Jungo driver, right?)

I'm primarily interested in communication between the PC's CPU and the FPGA via the PCI bus - the opencores PCI bridge should work for what I want, correct? (Oh, and I'm on Linux, so if you could let me know what issues that might raise I'd appreciate it as well).

Thanks.

Phil

Ouch! What exactly is this jungo driver needed for and are there open source alternatives? (if not, it sounds like a good time to start one ;-)

Phil

Phil

What you need as a driver depends on your software. I'm not a softy so I am not best person to talk about this. If you simply want to use a PC slot to power the card or do what Antti has done with his design that turns a RS1 into a parallel port look-alike you can get away without supplying a driver.

We are getting a drivers, XP and Linux, for our own PCI core but probably

4-8 weeks away from releasing the first of these. We have a number of customers using Linux on various boards so if you ask in the Linux community newsgroups someone may offer a driver.

We know of a customer successfully using the Opencore PCI. Other than there where some deficencies in the documentation we don't know much more other than that the size is larger than the Xilinx offering. Our own core is looking very good on size and features but more on that when we are ready to launch it.

John Adair Enterpoint Ltd. - Home of Broaddown2. The Ultimate Spartan3 Development Board.

We have the Raggedstone1 board running with the pci32_lite core from opencores.org. (Only a few minor changes were necessary).

I've written a simple linux driver along with a small user-space test program that can write hex numbers to the 7seg display.

I've started a webpage for it here:

Regards, Manuel

I don't need to be able to program the part on the board through PCI (I could program it through the parallel cable), but after the part is programmed I want to be able to transfer data between the CPU and the FPGA over the PCI bus.

If I understand correctly, I only need the driver if I want to be able to program the FPGA through the PCI - is that a correct assumption?

Sounds good (if I could program the FPGA through the PCI bus, that would be great, but it's not absolutely needed I think). Is your PCI core freely available with the board?

Phil

No, in Windows at least you need a driver installed or the OS won't let you access the board. This is all decided when the OS boots up.

From what I understand in Linux you can install/remove drivers on the fly (you might be able to do this in Windows if you know what you're doing).

I don't know about the Xilinx config devices that John uses for Raggedstone, but I can do this with Cyclone's and EPCS4's with my boards/PCI core. (Note I'm not set up to sell boards in volume, this isn't an ad for boards).

Nial

------------------------------------------------------------- Nial Stewart Developments Ltd FPGA and High Speed Digital Design

We have built the capability to drive the JTAG from the FPGA into Raggedstone1 in a similar fashion to what we did in MINI-CAN. You need the first build containing the PCI and JTAG interfaces to be loaded by the the ye olde JTAG cable. After that and providing you keep the PCI/JTAG interface in all subsequent builds the hardware features will be there so you can keep reprogramming the Platform Flash. The hard bit is driver/software support that may have to change as you add and remove different bits to the overall design.

Longer term we may build the JTAG interface into our own PCI core so that is there any time our core is used but it certainly will not be in the first cut of that core. It is our intention to have some kind of GUI interface but the details and practicality of this are awaiting some man time to do it.

Our PCI core will be available in a "lite" version to owners of Raggedstone1 free for use with their board. If you want to take the core onto a board design of your own, or have the more advance version, there will be a license fee based on a tier of usage. We will try to make this reasonable for the smaller guys out there so that the entry cost isn't a barrier to a small volume/value commercial project.

John Adair Enterpoint Ltd. - Home of MINI-CAN. The Spartan-3 CAN Bus Development Board.

with the core you're working on, how many space left to implement design ? x3s400 means 400k gates ? X.

We have not yet done a chapter and verse on this yet but for the full version with 6 BARs, worst case configuration, it is less than 1000 slices. You have about 3600 slices in a XC3S400. I have not got a definative answer beause we have number of modules in with in for debug purposes ans some more debug to do so some other things there to muddy the number.

We have designed the core to reduce in size in an optimal fashion if features are removed etc. So a single BAR configuration is likely to have a couple of hundred slices less. As yet the exact numbers have not been formally noted but we can see the size reduction if we twiddle the parameters that reduce functionality.

John Adair Enterpoint Ltd. - Home of UAP. Enterpoint's University Access Program.

I've just added the VHDL code and ISE Project files to my webpage.

Enjoy, Manuel

John, I have some questions : In the user manual it's stated that there is two sites for platform flash. If we solder the second flash, is it usable ? how we can select between the first and the second ? Can we fit two xcf04 and a bigger fpga ? X.

Xavier

There are two XCF04 sites. They are mainly just for FPGA programming. The second site is generally only usable if you are using a bigger FPGA unless you use the mechanism described in XAPP684. There are some words on our FAQ page

about this. As yet we have not tested the bigger FPGA in-site or the XAPP684 functionality. In theory Raggedstone1 can be fitted with as big a part as a XC3S2000 but if we do that it will be most likely be a special to celebrate something or dare I say it someone offers us enough money or reason to do it. The special might be the 10000th ship of Raggedstone1 but I'm only teasing at the moment. I think we are going to giving away some RS1-1500 shortly with our free seminar series not that we don't do that at RS1-400's normal selling price. If we do that we should at least get some testing done with a bigger chip fitted on Raggedstone1.

Back to the serious. There is a bypass resistor on the second flash which is removed for series use. Datasheet of Platform Flash should show the arrangement. Changing the FPGA isn't recommended unless you have a full BGA rework capability and even then you will invalidate warranty. If you want greater capability then I would recommend either of our 2 other Spartan-3 boards currently available - MINI-CAN or Broaddown2. Broaddown3 isn't far off either for those that want a very large Spartan-3. They are dearer but particularly the Broaddown2 can do so much more. There are some user features of Broaddown2 that we have not as yet tested or even mentioned in the manual such is the depth of things it can do. Anyway we took the best of Broaddown2 made it a 4 layer pcb that still got most of the XC3S400-4FG456C pinout used and got the £50 Raggedstone1. It's a very good board for the money and we're proud to have it as a product.

As with anything we do it is always worth knowing that we do custom specials. It does cost NRE and/or extra manufacture cost depending on the difference to the norm. Just depends what you want and when.

John Adair Enterpoint Ltd. - Home of Broaddown4. The Ultimate Virtex-4 Development Board.

Hi John ! I checked the XAPP 684, and don't see where it deals with fpga programming... Maybe I read it too fast X.

It is only for other items you want to store in Platform Flash like say some config data. Nothing to do with the FPGA load itself other than sharing the loading prom.

John Adair Enterpoint Ltd. - Home of Broaddown2. The Ultimate Spartan3 Development Board.