Field-Programmable Gate Arrays

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"does not fanout" warnings with inouts

Hello, I'm working on a project targeting a Lattice Mach4 CPLD using VHDL. In the past I have never used the inout VHDL...
0 comments posted 20yrs
posted by shawnn
0 comments posted 20yrs posted by shawnn

Altera RoHS Irony

Today I got this in Altera's email newsletter Get RoHS Compliant with Altera FPGAs, CPLDs and Structured ASICs I have n...
23 comments posted 20yrs
posted by dsp
23 comments posted 20yrs posted by dsp

Rocketio, modelsim xe

Hi, I'm trying to implement rocketio on xilinx fpga. Is there a way to simulate it using modelsim XE. I know for the PE...
2 comments posted 20yrs
posted by info
2 comments posted 20yrs posted by info

spartan-3e starter kit

I have been waiting to get the spartan 3e starter kit from xilinx for awhile now, but it doesn't seem to be out yet. Do...
13 comments posted 20yrs
posted by dahl0550
13 comments posted 20yrs posted by dahl0550

xilinx ise 8.1 mig 1.4 /1.5

hello the ise7.1 had the mig1.4 for memory interface generator does it work on the ise 8.1? if not is there any newer ve...
0 comments posted 20yrs
posted by MADORIG
0 comments posted 20yrs posted by MADORIG

ISVLSI 2006 - Call for Participation

+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ + IEEE International Symposium on VLSI 2006 + + +...
0 comments posted 20yrs
posted by isvlsi06
0 comments posted 20yrs posted by isvlsi06

How to decode FAR register in Virtex-4?

Hi everyone, I'm trying to understand how the frame addresses have to be decoded for a Virtex-4 FPGA from Xilinx. So fa...
6 comments posted 20yrs
posted by bertrand.rousseau
6 comments posted 20yrs posted by bertrand.rousseau

PacoBlaze updated

Hello folks. I would like to let you know that I have made a new release of PacoBlaze (2.0b). Some bugs noticed by user...
2 comments posted 20yrs
posted by pablobleyer
2 comments posted 20yrs posted by pablobleyer

Xilinx + I2C + PPC -> crash

Has anyone seen a PPC crash while using the I2C drivers. I have a simple EDK project with a PPC that reads and writes t...
0 comments posted 20yrs
posted by matt_news
0 comments posted 20yrs posted by matt_news

digital logic library by 74xxxx part number?

in the schematic capture of Xilinx ISE, there is ADD symbol button, which will allow you to pick a component by functio...
17 comments posted 20yrs
posted by aiiadict
17 comments posted 20yrs posted by aiiadict

spartan3 starter kit.

a really stupid question.... so general purpose ports/pins. where are they on the spartan 3 starter kit? so i read that...
9 comments posted 20yrs
posted by zhangweidai
9 comments posted 20yrs posted by zhangweidai