Field-Programmable Gate Arrays

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Purchasing Virtex-4 FPGAs

Hi, I'm looking for a way to purchase V-4 (more specifically V4FX20 and V4FX40) at very low quantities (4-5 devices). I...
2 comments posted 20yrs
posted by gpouikli
2 comments posted 20yrs posted by gpouikli

CoolRunner 2 CPLD

I want to know if the X2c family (coolrunner II) have a non-volatile program memory inside its package: I would like a...
2 comments posted 20yrs
posted by picinotti.duccio
2 comments posted 20yrs posted by picinotti.duccio

Any PCAD users here by any chance?

Since I upgraded Xilinx tools to ISE8.1SP2 I can start PCAD2004 while ISE is running... This is all on XP... Any ideas?...
2 comments posted 20yrs
posted by mbmsv
2 comments posted 20yrs posted by mbmsv

CSV files available for Xilinx FPGA parts pinouts?

Hello all, Are there any CSV formated files available with the pinout/names/etc information for xilinx FPGA parts? I've...
5 comments posted 20yrs
posted by weingart
5 comments posted 20yrs posted by weingart

Multiple clocks design

Hi all, I've got a VHDL design for Stratix Altera FPGA with several differents clocks (5). There's a clock generator wh...
0 comments posted 20yrs
posted by patrick.melet
0 comments posted 20yrs posted by patrick.melet

Variable problem

Hi all I am new to vhdl and xilinx ise. I can generate the waveform for the code (no syntax error) but it produces an e...
5 comments posted 20yrs
posted by ywz.oct13
5 comments posted 20yrs posted by ywz.oct13

Spread Spectrum Cores ??

Does anyone know of freeware spread-spectrum cores; particularly DS ? I'm looking for something which basically takes s...
3 comments posted 20yrs
posted by nospam
3 comments posted 20yrs posted by nospam

reading data off a virtex-ii pro board

Hi all, I have some program receiving data on a virtex-ii pro board. I'm trying to obtain information from the board, s...
1 comments posted 20yrs
posted by dasani8888
1 comments posted 20yrs posted by dasani8888

Using XMD to upload from board

I have a program running on my board using the xilmfs. When the program completes, I want some of the files in the file...
0 comments posted 20yrs
posted by joeylrios
0 comments posted 20yrs posted by joeylrios

boundary scan example with spartan3

has anybody an example (possibly) written in vhdl of bscan_spartan3 use or similar? thank you
0 comments posted 20yrs
posted by bergnoli
0 comments posted 20yrs posted by bergnoli

Altera FIR compiler

Hello, I am trying to use altera FIR compiler to design a root raised cosine filter for a DVB transmitter of HDTV. Howe...
0 comments posted 20yrs
posted by samuelgoto
0 comments posted 20yrs posted by samuelgoto

DSP Builder @ System Generator

I am evaluating them to see if they would be any benifit for a project I am working on. So far I have not been able to...
1 comments posted 20yrs
posted by lecroy7200
1 comments posted 20yrs posted by lecroy7200

Spartan 3 DCM

If am running a simulation in modelsim an there is a DCM block with locked signal. Now because correct me if I am wrong...
5 comments posted 20yrs
posted by maxascent
5 comments posted 20yrs posted by maxascent