Field-Programmable Gate Arrays

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Image Compression in an FPGA

Someone is looking to generate compressed images in an FPGA to display graph data on a browser. Looking around the GIF,...
8 comments posted 11yrs
posted by gnuarm
8 comments posted 11yrs posted by gnuarm

Special issue of Xcell Journal

Hey folks, my team just posted a new issue of Xcell Journal. Here is the link to the pdf: http://www.xilinx.com/publica...
0 comments posted 11yrs
posted by mike.santarini
0 comments posted 11yrs posted by mike.santarini

Calculate dynamic power at fmax in Quartus

Dear All, Why dynamic power after compilation complete equal to zero, any idea how can I calculate dynamic power at max...
2 comments posted 11yrs
posted by 107078
2 comments posted 11yrs posted by 107078

Dynamic Array in VHDL

want to use dynamic range of array , so using "N" for converting an incoming vector signal to integer. Using the specif...
2 comments posted 11yrs
posted by 106037
2 comments posted 11yrs posted by 106037

Distributed ram timing qurry

I have several fifos that are small and implemented as distributed ram.There are some timing violations reported on pat...
5 comments posted 11yrs
posted by 37480
5 comments posted 11yrs posted by 37480

What's the name of this circuit?

Hi, I need to design a sub-module with 128-bit input and output stream interfaces (4 DWORDs/cycle) which can split the...
3 comments posted 11yrs
posted by Guy.Eschemann
3 comments posted 11yrs posted by Guy.Eschemann

SVF test vector injection - generating SVF files

Good morning, I was trying to run some test vectors on an ATF1504ASVL_A44 CPLD. Even found some BSDL files on the net(n...
3 comments posted 11yrs
posted by klammerj
3 comments posted 11yrs posted by klammerj

Conditional Interpretation of VHDL

I have a small project that produces a clone of the "BABY" computer at MOSI. I want to be able to produce two versions...
14 comments posted 11yrs
posted by dave.g4ugm
14 comments posted 11yrs posted by dave.g4ugm

Energy efficiency of FPGA vs GPU vs CPU

This survey paper published in ACM Computing Surveys 2015 compares GPU with FPGA and CPU on energy efficiency metric. M...
1 comments posted 11yrs
posted by sparsh0mittal
1 comments posted 11yrs posted by sparsh0mittal

PCIe card with FPGA and DAC

I got a call from a really nice guy who has a tiny company in the Bahamas. Our gear is too expensive for his applicatio...
6 comments posted 11yrs
posted by jlarkin
6 comments posted 11yrs posted by jlarkin

Open/Free HLS weapon of choice ?

Hello all, I would like to know which open or free HLS (High Level Synthesi s) tools are gaining widespread use, or are...
8 comments posted 11yrs
posted by capossio.leonardo
8 comments posted 11yrs posted by capossio.leonardo