Field-Programmable Gate Arrays

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Gemac on ML402

Hi, Does anyone run the Gemac on a Xilinx ML402 board ? I try to use the example design that comes with the core but it...
0 comments posted 18yrs
posted by josue.freitas
0 comments posted 18yrs posted by josue.freitas

Why use small resistor for Vcco voltage regulator

In Xilinx application notes XAPP457 ( http://www.xilinx.com/support/documentation/application_notes/xapp457.pdf), the r...
11 comments posted 18yrs
posted by junsong.liao
11 comments posted 18yrs posted by junsong.liao

Loading the design from Compact Flash...

Hi everybody, It's been a while I'm struggling with ML310 board to have my design loaded from compact flash to the Virt...
6 comments posted 18yrs
posted by amirhossein.gholamipour
6 comments posted 18yrs posted by amirhossein.gholamipour

Low Pin Count (LPC) bus code available?

I'm working on a Low Pin Count (LPC) bus interface and would like to double check my design with an existing implementa...
2 comments posted 18yrs
posted by johnp3+nospam
2 comments posted 18yrs posted by johnp3+nospam

question about fsl and microblaze

hi i'm just working on a project where i need to create an fsl interface for my custom ip core. i used the "create and...
3 comments posted 18yrs
posted by u_stadler
3 comments posted 18yrs posted by u_stadler

Xpower

Hi All, I am trying to see the power consumption of some design using XPower with ModelSim generated .vcd file I get th...
1 comments posted 18yrs
posted by charles.wagner
1 comments posted 18yrs posted by charles.wagner

Design security for pre-Virtex2 parts ?

Hi all, Has anyone ever tried to improve the security for the old Xilinx FPGA devices, which doesn't have the 3-DES encr...
8 comments posted 18yrs
posted by ccon67
8 comments posted 18yrs posted by ccon67

iru1209 regulator

Hello all, i have a design finished a few month ago, that is working fine on a xc2s200-pq208, but when i port it to a x...
2 comments posted 18yrs
posted by walther.zabel
2 comments posted 18yrs posted by walther.zabel

Xilinx BSCAN primitives proper use

Has anyone managed to get the xilinx BSCAN primitives (for interfacing with the USERx jtag registers/comands) working r...
10 comments posted 18yrs
posted by jonas
10 comments posted 18yrs posted by jonas

FPGA in Telecommunications

Hello All, I am curious what are main applications of FPGA in Telecommunications? It's well known (well, at least for s...
7 comments posted 18yrs
posted by vladimir.v.korostelev
7 comments posted 18yrs posted by vladimir.v.korostelev

Actel Fusion FPGA

Hello, I am working on Actel Fusion FPGA. I am having problems with the ADC in my design. Can someone please help me wit...
3 comments posted 18yrs
posted by iamrehman
3 comments posted 18yrs posted by iamrehman

I need a SDRAM controller

Hi everybody! I did a controller to SRAM, so, I need controller a SDRAM, like it=B4s more difficult, (refresh). I=B4m l...
8 comments posted 18yrs
posted by dorama2
8 comments posted 18yrs posted by dorama2

new to NIOS II

Hello group, Recently I have started to learn NIOS. I will appreciate it if somebody knows any good online resource or b...
2 comments posted 18yrs
posted by amit.kohan
2 comments posted 18yrs posted by amit.kohan

About 10-bit pixel datum from CMOS image sensor

Hi all, I am sorry if this problem has been answered but I cannot find much help from the archive. I am using a Spartan...
6 comments posted 18yrs
posted by tklau
6 comments posted 18yrs posted by tklau