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Xilinx's interp on EDIF properties

This line in EDIF works to change the IOSTANDARD:

(property IOSTANDARD (string "LVCMOS25"))

It seems to work whether on the pad instance or the buffer instance. What I can't figure out is how to set the PULLUP/PULLDOWN stuff in EDIF. I end up running the FPGA editor and turning it on manually after every build. I've tried

(property PULLUP (string "TRUE")) and (property PULLUP (string "YES"))

on both the pad and the buffer but it seems that the tools entirely ignore it. Any ideas?

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Reply to
Brannon King
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Reply to
Symon

At one point this worked, though the usage may now be deprecated:

(property xc_pullup (integer 1))

Reply to
Tim

What synthesis tool do you use? If you use DC-FPGA or DC you can do

set edifout_write_properties_list "PULLUP PULLDOWN"

You will most likely add lots of other properties too (LOC, IOSTANDARD, etc.)

Then you can use set_attribute to set the property.

set_attribute /yourdut/yourbuf PULLUP -type string TRUE

Then the property will be exported to the netlist when you do write_file -f edif ...

Petter

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Reply to
Petter Gustad

Others have suggested putting attributes or instantiating the PULLx in code; have you tried putting the property in the constraints file?

JTW

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Reply to
jtw

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