Is there a way to access the platform cable USB from a user program (i.e., from outside the Xilinx toolchain) ? What I'd like to do is access a BSCAN module inside my design from a custom win32 application. Many thanks, Guy.
Those articles show how to acess the JTAG interface from logic inside the FPGA. What MotM wants is to access the JTAG chain from the PC.
Unfortunately Xilinx does not provide any API to do this, and believes that the interface to their PC4 and Platform USB cables is some kind of super-valuable trade secret, so the answer is that you can't do it with the Xilinx cable. You have to use a third party JTAG interface, and swap JTAG cables back and forth. :-(
There *must* be some kind of API that Xilinx uses in their own software to do this. C'mon, guys, open it up for customer use!
I believe that one option is to use the Xilinx cable, but download your own firmware to it rather than the firmware the Xilinx tools download. Since the firmware defines the interface, you can then use it anyway you like...
It is a Cypress fx2, isn't it? Or is is that only true of the Digilent cables? It is one of the FTD chips?
Yes, you can do that. You have to download your own CPLD configuration too, unless someone reverse-engineers the one that Xilinx uses. So every time you switch between using the cable for Xilinx software vs. for your own software, you have to wait while the CPLD is reprogrammed.
If you read the article thoroughly you can see that they include some TCL scripts that use Xilinx' drivers to access the JTAG interface from the PC.
I haven't tried this myself but my impression is that you will have an easier time doing that if you have access to chipscope but it should be doable without. The following is a paragraph taken from the first link I posted above:
---------------- Xilinx provides all of the tools required for you to write simple scripts to access the USER registers through the JTAG interface. ISE tools provide a custom TCL shell (xtclsh), while the Xilinx ChipScope Pro tools provide a TCL script (Figure 5) (tcljtag.tcl) that creates a number of high-level TCL commands to control the JTAG interface.
I have tried it and it works. I use it quite often to put "debug" modules that I can control easly via my PC without the need for another interface. (And also you don't have to bring the signals to your top level ;)
It's not very fast though ... IIRC, it takes me almost 30 min to grab
16Mbytes of data ... The wider your User register is, the faster in my experience.
The interface has changed in 9.1, I haven't tried the new one yet.