We purchased an ML461 board in Aug of 05 for $6000 from Avnet. If I follow the documention that came with the board, it has a memory test screen that led me to believe that the board is running some sort of memory test and reporting errors on the LCD. If I look at the source files the came with the board, they do not appear to be what was used to create the actual images being loaded into the board. So, for example, FPGA 4 controls all of the LCD functions, however looking at the actual code that was supplied for FPGA 4, there is no support for the LCD. The actual code for FPGA 4, for example will not even compile without errors. What is more strange is that if I look in FPGA 3 which contains the QDR controller, there appears to be only one signal that reports the errors back to FPGA 4 and it is not routed to it. So, there appears to be no way for FPGA to actually detect an error. For fun, if I load FPGA 3 with the binary for FPGA 2, FPGA 4 reports no memory errors on the LCD. Not that this proves that the design was faulted, but it does raise my suspicions. I also found some other pins defined in the source files that do not match the schematics that were supplied.
I had opened a case, spoke with two different FAEs and even tried to get our money back from Avnet. Avnet claims Xilinx will support the board and the last message from them provided me an inside contact at Xilinx who was supposed to know this board and be able to help. When I called him a few weeks ago he explained he was in marketing, not engineering and suggested that I open a case number with Xilinx, which I have, yet again. I have now came full circle with this board.
Does anyone here have all of the code that was used to create the images for this board?