i'm designing a board with a Xilinx XC4VFX12-11SF363C and DDR2 memory components following the design used in Virtex-4 ML461 Memory Interfaces Development Board User Guide [ug079].pdf as a general guideline the question i have is regarding the signal termination for the bidirectional signals the guide recommends FPGA Driver Termination at FPGA Termination at Memory
SSTL18_II 50 ohms pull up to 0.9V 50 ohms pull up to 0.9V
but one could also use
FPGA Driver Termination at FPGA Termination at Memory
DIFF_SSTL_II_18_DCI No termination 50 ohms pull up to 0.9V
so i can save placing the required pull up resistors near the fpga
but if the memory components are close to the fpga
can i safely remove the memory component pull up resistors?
thanks
enzo
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