Xilinx FPGA editor error ISE8.2

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yttrium 19 years ago

Hey, when i run a script through FPGA editor i get the following error:

setattr comp c_DDR2_framebuffer_0/c_Ddr2Interface/i_DDR/i_DdrInputOutput_DataEvenFromSdr_d(2) Config CE1INV:CE1\ CLKDIVINV:CLKDIV\ CLKINV:CLK\ IDELAYMUX:1\ IFF1:\#FF\ IFFDELMUX:0\ IFFMUX:1\ INIT_Q1:0\ INIT_Q2:0\ INIT_Q3:0\ INIT_Q4:0\ IOBDELAY_TYPE:VARIABLE\ IOBDELAY_VALUE:0\ Q1MUX:IFF3\ Q2MUX:IFF4 ERROR:FPGAEditor:25 - "CE1INV:CE1 CLKDIVINV:CLKDIV CLKINV:CLK IDELAYMUX:1 IFF1:\#FF IFFDELMUX:0 IFFMUX:1 INIT_Q1:0 INIT_Q2:0 INIT_Q3:0 INIT_Q4:0 IOBDELAY_TYPE:VARIABLE IOBDELAY_VALUE:0 Q1MUX:IFF3 Q2MUX:IFF4" is not a valid value for the Config attribute. BRBCF ILOGIC Failure: INVALID_RB: "IFF1::\#FF" CFG: "CE1INV:CE1 CLKDIVINV:CLKDIV CLKINV:CLK IDELAYMUX:1 IFF1:\#FF IFFDELMUX:0 IFFMUX:1 INIT_Q1:0 INIT_Q2:0 INIT_Q3:0 INIT_Q4:0 IOBDELAY_TYPE:VARIABLE IOBDELAY_VALUE:0 Q1MUX:IFF3 Q2MUX:IFF4"

even when i make this change manually and then save and record this a script and then run it, it gives me that error. So when FPGA editor generates the following statement:

setattr comp c_DDR2_framebuffer_0/c_Ddr2Interface/i_DDR/i_DdrInputOutput_DataEvenFromSdr_d(2) Config CE1INV:CE1\ CLKDIVINV:CLKDIV\ CLKINV:CLK\ IDELAYMUX:1\ IFF1:\#FF\ IFFDELMUX:0\ IFFMUX:1\ INIT_Q1:0\ INIT_Q2:0\ INIT_Q3:0\ INIT_Q4:0\ IOBDELAY_TYPE:VARIABLE\ IOBDELAY_VALUE:0\ Q1MUX:IFF3\ Q2MUX:IFF4

and that one is exactly the same as the one in my script then what am i doing wrong??? to get me that answer?

Thanks in advance for your help,

kind regards,

Tim

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John_H 19 years ago

I don't have an answer, but a suggestion: break the config into its parts. If you set the Config IFF1 in one line and Config INIT_Q4 in another - just one per line - you might find out what "really" fails.

If I had to guess I'd think the line length in your command is a problem. Breaking it up eliminates this issue and can let you debug the problem to its core.

c_DDR2_framebuffer_0/c_Ddr2Interface/i_DDR/i_DdrInputOutput_DataEvenFromSdr_d(2)

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Tim Verstraete 19 years ago

Hey,

I just updated to ISE8.2SP2 but still the same issue ...

i started debugging the issue and found that for some reason it has a problem with the IFF1:\#FF\ statement and still Xilinx makes the same attribute when i use the records script option and do the changement manually? i've mailed to my FAE just in case ...

thanks for the feedback,

kind regards,

Tim

John_H schreef:

c_DDR2_framebuffer_0/c_Ddr2Interface/i_DDR/i_DdrInputOutput_DataEvenFromSdr_d(2)

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yttrium 19 years ago

c_DDR2_framebuffer_0/c_Ddr2Interface/i_DDR/i_DdrInputOutput_DataEvenFromSdr_d(2)

I have found that you should write IFF1:FF instead of IFF1:\#FF\ ... only the Xilinx tools also write the second version instead of the first one ... so if you just correct this one it works fine again ...

thanks for the feedback anyway...

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Xilinx FPGA editor error ISE8.2

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