Hi,
Usually I do not post such questions but I've got no answer from Xilinx and I want to be sure I have right. I've took a deep look to the SODIMM schematic side of ML501 and ML505 from Xilinx. See here:
formatting link
SODIMM schematic on page 13. Supply schematic for SODIMM on page 25 (VTTVREF and VTTDDR) Interfacing SODIMM to FPGA on page 3.
The schematic is using external 47 ohm terminators for address and control bus and DCI voltage reference resistors for data bus. Active terminators for data bus are supplied from VCC1V8.
The regulator used for VTTVREF (page 25) is a 3A sinking/sourcing used usually for external terminators but the load on VTTVREF in my opinion is not bigger than a few miliamps (supplying the VREF of SODIMM and a few Vref inputs in banks 15,17,19,21).
Do I have right ?
thank you, Vasile