Hi, I have implemented a core to write/read to a Bram_Block (using one of the two ports). The another port is used by Microblaze with a lmb_bram_if_cntlr core to read those values which had been modified by my custom core. Of course, I use a lmb bus.
Now, I want to create a design with PowerPC and I suppose I must use a plb bus to access to the bram_block. With this assumption, PowerPC would use a plb_bram_if_cntlr core to read from the bram (this works fine), but my custom core cannot modify the contents of the bram.
What's wrong?. Is plb bus very different from lmb?. Could I use a lmb bus with PowerPC instead of Microblaze?