Removing DC offset from ADC Buffer

Just average the samples and subtract that average from each new sample. There are several ways to do that average:

Sum the last N samples and divide by N.

Exponential smoothing: Avg = Avg + (new-Avg) / N

A real higher-order lowpass filter, in software.

You could average each 400 points and use that as the "dc bias" to subtract out before doing the RMS, but 400 isn't a lot of points, so the zero value will be noisy. Unless you really have a use for 400 points, there's no need to store any of the samples to get a running RMS.

I'd go for the exponential smoothing. Then square each zero-corrected sample, lowpass filter, square root when needed.

g at 6kHz and storing 400 samples. The signal has a DC bias equal to Vcc/2 = 1.65V. In the digital domain this is 2048. In hardware this DC value is very precise, but when sampling it, it varies from 2044 to 2052 inside the buffer. Now if I want to do RMS in that set of data, I need to find a way to deal with this DC bias variation.

ood as I said above this value may vary slightly. Also, if I want to read z ero cross it may cause errors to choose exactly 2048 as reference.

value when there's no input signal.

that's a FIR filter (finite impulse response) ... if you choose the sample size and know the likely interference sources (like, 60 Hz ripple), it allows you to place a null appropriately

that's a IIR filter (infinite impulse response); usually not a great choice

Like, FIR with weights.

Why not? I see a lot of irrational prejuduce against simple IIR filters, in code and in FPGAs. Some people would rather write a hundred lines of code instead of one.

If integer math is all that's available, the divide-by-N is just a right shift.

Or a multipole IIR. It's fun to do those with just right-shifts too. Again, just a few lines of code.

Run ADC with DMA continous at a high rate and oversample. Things will get much smoother that way, if your sampling is done right.

He still needs to take the DC offset out. Given that the signal comes from a CT, and has no inherent DC component, it can be auto-zeroed by just averaging lots of samples.

Oh, it's simple, all right, but it has a long startup transient. That means it doesn't deal with lightning-strike artifacts well, either. In cases (like, reading an analog tape) where you want to reject a particular frequency (the recording bias generator), it doesn't have enough flexibility. FIR was eventually the big winner in CD playback, for instance.

Any lowpass filter or averager does. Just poke a starting value into the integrator node if you're in a hurry, ADC midscale in this case. Or go for 2nd order. An auto-zero system works fine with a droopy 1st order filter.

You have to wait for an FIR filter to fill up, and the output is nonsense until it does. You can poke a start value into it, but you have to load all the nodes.

Presumably an ADC rails on a huge transient. Why would an IIR filter be worse than a FIR for a spike? If you hate long tails, go 2nd order.

It's impressive how many convoluted arguments people make to avoid IIR digital filters. Most of them reduce to "It's too simple and I don't like it."

A lowpass needn't be considered appropriate during startup (and brute-force setting a starting value helps). FIR has a time-limit on its history, which is often completely appropriate and useful.

Small signal in big digitizer range, of course. Your 'rails' scenario is a measurement failure, and there's multiple ways to treat such a thing, which FIR does by... ignoring the spike a few samples afterward. IIR doesn't do that, so saturating the digitizer is an alternate solution that you don't seem to dislike.

I'm pleased that my response impresses you.

But not any that I mentioned; what ARE those other "convoluted arguments"? I'd like to judge their merits for myself...

I was just thinking how crazy it woud be to use, say, a 5000-tap FIR filter to compute a good autozero average value of the last 5000 samples.

Those 5000 multiply-by-1-and-add blocks will need a lot of logic.

at 6kHz and storing 400 samples. The signal has a DC bias equal to Vcc/2 = 1.65V. In the digital domain this is 2048. In hardware this DC value is very precise, but when sampling it, it varies from 2044 to 2052 inside the buffer. Now if I want to do RMS in that set of data, I need to find a way to deal with this DC bias variation.

od as I said above this value may vary slightly. Also, if I want to read ze ro cross it may cause errors to choose exactly 2048 as reference.

Only you can tell us if this fairly small variations are large enough to ca use problems.

The part I am confused about is when you say the bias is very stable in the analog domain this bias voltage is very stable, but you show pretty small

I guess I was thinking you were blaming it on the ADC rather than the input signal, but you didn't say that.

What's wrong with that? Is this easy to do?

alue when there's no input signal.

Again, you tell us if that's a problem?

Funny that people propose you use a low pass filter and subtract. A high p ass would just provide the AC without the DC. It would take some time to s tart up, but can work very effectively. If this sampling is continuous tha t would work fine.

You don't provide any info on relative time of the samples. We did some te sts on an STM32 ADC using RC ramps and found the signal to be a very good f it to a log curve, so low linearity errors. However there was a small amou nt of noise in the ADC output which was withing the data sheet spec of 4 or 5 lsb counts depending on the mode. Which chip are you using?

I'm thinking this amount of noise you are seeing is not enough to disturb m ost calculations, but I don't know what you are using the data for. Not ma y ADCs are good for every bit of resolution. There are often linearity and noise issues that trash the lsb or two. What happens if you round your AD C values to 10 bits? Does that make you happier or do you need all 12 bits of resolution?

Clearly not the best way to make a boxcar filter... LOL. I see what you did there.

The DSP book by Rick Lyons (Understanding digital signal processing, ISBN 0-13-70241-9) has a good handling of DC removal in part 13.23, pages 761-765 in my copy.

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You mean to construct a straw man design and then shoot it down? An IIR fi lter is nothing like a 5000 tap boxcar filter.

One point no one has talked about is the sensitivity of various filters to the artifacts caused by frequency content that is not a multiple of the sam ple rate. If you don't get an integer number of wave cycles in a filter ti me window, the result is artifacts that will mess up an average calculation .

With a FIR filter the coefficients can be tailored to mitigate this effect, but this isn't true of a simple IIR filter.

I'm not at all clear any of this needs to be done. I expect the variations seen on individual measurements are just "noise" in the ADC readings with virtually no impact on the average.

No, I'll let you know tomorrow, I don't want to spoil it for others.

Yeah... seems like the twilight zone here. All this FIR, averaging and $hit... seems to be... the plot is lost....

From the description the poster is measurement an AC signal, thus stick a cap on the input to block the DC and you're done....

-- Kevin Aylward

There is no dc to remove from the input. Its a current transformer. The problem is that the ADC needs to be biased at the midpoint of the positive-only supply so that it can digitise positive and negative outputs from the CT. The converted values of that midpoint bias are not completely stable and need to be removed before the rms calculation, otherwise small alternating signals are swamped by the offset error.

John

Exactly. You can auto-zero to a fraction of an ADC LSB. Then your RMS measurement is limited by ADC quantization and linearity. ADC offset usually drifts slowly, so the autozero can use tons of samples and need not be especially fast. Averaging the last 65536 samples at your

I did software az in my electric meters. And added a little noise dither to the ADC front end. That added a little baseline offset to the reported RMS currents, but vastly improved low-level power measurement. It's actually hard to design electronics that's as good as an old disk-type meter. The only spec I really beat them on was tilt.

There's a trick to adding dither without increasing the apparent RMS floor much. The nuclear guys do that in pulse-height spectroscopy.

Fancy IIRs can have bad behaviour such as limit cycles. Slow 1-pole IIR lowpasses can run out of precision if poorly designed, on account of the LSBs of the new values getting lost in shifting.

Thought is required.

Its temporal response was intentionally made very slow for SNR reasons--insulating the pixels with air slowed them down, but the slowdown was due to bass boost rather than treble cut, so to speak, so the SNR was better at all frequencies. One wrinkle was that the accumulated charge got dumped on every measurement, so the raw data was a first finite difference of a slow continuous-time function.

It would have needed a gigundo long FIR filter to fix it, but it turned out that the desired pseudo-inverse function could be factored into a

(I still did the filtering on the PC side, but it could probably just have been done on the micro.)

Cheers

Phil Hobbs