Friends, i have been struggling for 1.5 months on a problem.Let me explain u a little bit.
I am working on FPGA implementation of Dijkstra's Shortest Path Algorithm on XILINX 7.1 ISE.Now I hav implemented the code in verilog.The Number of nodes in my case is 256(IF U REQUIRE MY CODE I WILL SEND IT).The tragedy is that the code is working fine but when i m synthesizing it it is giving the following error which i am unable to resolve.
The error is " Portability:3 - This Xilinx application has run out of memory or has encountered a memory conflict. Current memory usage is 1869512 kb. Memory problems may require a simple increase in available system memory, or possibly a fix to the software or a special workaround. To troubleshoot or remedy the problem, first: Try increasing your system's RAM. Alternatively, you may try increasing your system's virtual memory or swap space. If this does not fix the problem, please try the following: Search the Answers Database at support.xilinx.com to locate information on this error message. If neither of the above resources produces an available solution, please use Web Support to open a case with Xilinx Technical Support off of support.xilinx.com. As it is likely that this may be an unforeseen problem, please be prepared to submit relevant design files if necessary. ERROR: XST failed"
My verilog code consists of following operations:1)Calulating the adjecancy Matrix and Path Matrix. 2)Recursive Algorithm using Task (Palnitkar says that Task and Function is Synthesizable).
Also let me inform u that my code is 100% behavorial.
While synthesizing It shows "Enabling Task " for 8 hrs and then shows above error. If u know anything about the above error please tell me as the deadline is approaching fastly for project submission. Looking for ur help Thanx Saroj mail me at: firstname.lastname@example.org