I'm seeing some unexpected behavior when using the Xilinx TNM constraint in a ucf file. I'm using the 8.2.03 version of the s/w.
I have several groups of signals that cross clock domains. Normally, I've used the following and it works OK: TIMESPEC "ts_os_x3a" = FROM FFS(u_os_if/rd_burst) to FFS(upo_joey_if/xmit_data) = 12; TIMESPEC "ts_os_x3b" = FROM FFS(u_fx2if/reg_brst_rd) to FFS(upo_joey_if/xmit_data) = 12;
I then tried: NET "u_os_if/rd_burst" TNM = x_rio_tx; NET "u_fx2if/reg_brst_rd" TNM = x_rio_tx; TIMESPEC "ts_os_x3" = FROM x_rio_tx to FFS(upo_joey_if/xmit_data) = 12;
and I was VERY surprised at the result. Instead of applying the constraint from the rd_burst and reg_brst_rd signals to the xmit_data signals, it instead constrained a path from xmit_data to xmit_data.
Is this yet another Xilinx bug or am I mis-using the TNM constraint?
Thanks!
John Providenza