XPS (NGCBUILD) fails when creates netlist: "failed to copy to implementation"

I created a peripheral named o2p, it is a bridge to communicate the PLB Bus with a On Chip Bus(developed in my company). Using the BFM simulation, I was able to see that it works, afterthat I imported the peripheral and I tried to generate the netlist of the system with the new peripheral. I found the following error:

###################################################################### o2p_0_wrapper (o2p_0) - /home/ferorcue/my_work/project/xps/xps_200_5/system.mhs:122 - Running XST synthesis

Running NGCBUILD ...

ERROR:MDT - o2p_0_wrapper (o2p_0) - /home/ferorcue/my_work/project/xps/xps_200_5/system.mhs:122 - failed to copy to implementation ERROR:MDT - platgen failed with errors!

make: *** [implementation/o2p_0_wrapper.ngc] Error 2

######################################################################

the file o2p_0_wrapper_xst.srp shows the following information:

###################################################################### Analyzing generic Entity (Architecture ). DATA_W = 64

LOG2_LENGTH = 4

WARNING:Xst:821 - "/home/ferorcue/my_work/project/xps/xps_200_5/pcores/ o2p_v1_00_a/hdl/vhdl/xilinx_fifo.vhd" line 59: Loop body will iterate zero times WARNING:Xst:1994 - "/home/ferorcue/my_work/project/xps/xps_200_5/ pcores/o2p_v1_00_a/hdl/vhdl/xilinx_fifo.vhd" line 140: Null range in type of signal . WARNING:Xst:1994 - "/home/ferorcue/my_work/project/xps/xps_200_5/ pcores/o2p_v1_00_a/hdl/vhdl/xilinx_fifo.vhd" line 141: Null range in type of signal . WARNING:Xst:1995 - "/home/ferorcue/my_work/project/xps/xps_200_5/ pcores/o2p_v1_00_a/hdl/vhdl/xilinx_fifo.vhd" line 474: Use of null array on signal is not supported. INTERNAL_ERROR:Xst:cmain.c:3068:1.158.10.1 - To resolve this error, please consult the Answers Database and other online resources at

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xilinxs_fifo.vhd is a FIFO, this file and all the files of my peripheral o2p are synthesiable, I checked with synplify_pro( any errors and also any important warnings).

My system is a PowerPC, and I run the XPS in windows and in Linux with the same results. The edk directory does not contains any spaces: /home/ferorcue/simlib/EDK8.1.02_mti_se_linux/EDK_Lib/ /home/ferorcue/simlib/EDK8.1.02_mti_se_linux/ISE_Lib/

I did not find any appropriate information in the Answers Database of xilinxs.com. Any clue? Thank very much.

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ferorcue
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You said that you checked that this was synthesizable with synplify pro, but the EDK report file shows that it is using XST for synthesis.

I would guess from these lines that XST does not support what you are trying to do:

^^^^^^^^^^^^^^^^^

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Either change your EDK setup to use synplify pro for synthesis, or recode what XST is complaining about.

Regards,

John McCaskill

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Reply to
John McCaskill

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