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Synplify/Quartus used to support direct to Hardcopy?

I seem to remember Synplicity and Quartus allowing the user to select an Altera Stratix Hardcopy device as the target directly, as opposed to targeting an FPGA that is used for prototyping. Quartus 3.0 seems to support this, and I swear Synplicity did as well. However, I've gone back from Synplify 7.7 to 7.1, and I can't find any versions that support Stratix Hardcopy as a target. Am I crazy, or does anyone else remember this? Also, why did Altera remove support for this? Now, you have to use an FPGA prototype, and there doesn't seem to be a path to go directly to a structured ASIC. Thanks.

John

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John M
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John,

Altera requires anyone doing a HardCopy design to first prototype it in an FPGA, so there isn't really a direct route to HardCopy. It's not a technical issue, it's simply that our whole value proposition (over other firms of ASIC) is that we match the functionality and timing constraints of the FPGA, so that you know when you replace the FPGA with the HardCopy it will work the same. Technically, we could certainly remove this restriction but then if the HardCopy device didn't work in the system, we wouldn't be able to see where the problem lay.

Regarding Synplicity support, I'll have to check 7.1 vs 7.7 but if you simply target the appropriate Stratix FPGA in Synplicity, this will do all the required synthesis to LEs and you can then use Quartus II to do the mapping to the HardCopy Stratix device.

Hope this clears up your questions.

Paul Holl> I seem to remember Synplicity and Quartus allowing the user to select

Reply to
Paul Hollingworth

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