I would like to compile my new design to get a baseline number for resource usage. I have done this before, but I don't remember how to set up VHDL component libraries using Quartus. I have a common and a hardware library and a couple of VHDL source files for each. I can't find a way to associate the source files with the particular libraries. In Modelsim you just create the library and make the connection in the GUI. I can create a library in Quartus, but I can't find a way to connect this to a source file. I am also not sure that this is the same as a VHDL library.
The help files seem to skirt around this issue... any advice?