May sound like a stupid question to experts but I'm more a sw/fw guy :
How do you make it ramp slower ? Is there any obvious trick ?
Looking at my regulator datasheet, doesn't even specify ramp rate ...
Sylvain
May sound like a stupid question to experts but I'm more a sw/fw guy :
How do you make it ramp slower ? Is there any obvious trick ?
Looking at my regulator datasheet, doesn't even specify ramp rate ...
Sylvain
Bulk capacitance on the regulator output will slow the ramp rate for either switching regulators or current-limited linear regulators (that turn on from a fixed voltage rather than ramping up with its input voltage).
If you're trying to enable a regulator that doesn't include a current limit from a supply that's already steady, bulk capacitance won't provide the predictable ramp rate.
Sylvain,
Ramp on time is deterimined by the size of the filter capacitor, and the current capability of the power source.
So, for example, if the supply can't output more than 10 amperes, and you have 1,000 uF of filtering, then using I=CdV/dt, and solve for dt,
dt = CdV/I
or .001F * 3.3V/10A = 330 us.
Now you would need a LOT of capacitance to slow this down to 3.3 mS, basically 10,000 uF instead of 1,000 uF.
If the supply was current limited at 1 ampere, then 1,000 uF would be just fine. Typically we suggest at least 4 470uF for the core, and a similar number for the Vcco, so that would closer to 2,000 uF, and life would be good all around unless the current output is so great that the voltage rises faster than the spec sheet allows.
Aust> Hi
: > Just ramp on slower than that indicated in the data sheet, and : > everything is fine.
: May sound like a stupid question to experts but I'm more a sw/fw guy :
: How do you make it ramp slower ? Is there any obvious trick ?
: Looking at my regulator datasheet, doesn't even specify ramp rate ...
Go to the Website of Regulator suppliers, like National Semiconductors or TI. They have application notes for FPGA supplies. E.g. TI has a Family of fast regulators. To limit the ramp up, they use a MOSFET. Look e.g at
Bye
-- Uwe Bonnes bon@elektron.ikp.physik.tu-darmstadt.de Institut fuer Kernphysik Schlossgartenstrasse 9 64289 Darmstadt --------- Tel. 06151 162516 -------- Fax. 06151 164321 ----------
Are you sure you should include Virtex-II and Virtex-II Pro in this list? When I read the data sheet it still lists a minimum power up current of up to 1.1 Amps. If this is not the same issue as the Virtex and Spartan II parts, then what exactly is this current about?
Or maybe my copies of the data sheets are old???
-- Rick "rickman" Collins rick.collins@XYarius.com Ignore the reply address. To email me use the above address with the XY removed. Arius - A Signal Processing Solutions Company Specializing in DSP and FPGA design URL http://www.arius.com 4 King Ave 301-682-7772 Voice Frederick, MD 21701-3110 301-682-7666 FAX
Rick,
We left the 'minimum power on current' in the data sheet so that folks would always be able to turn them on.
The minimum current is not so much different now from the maximum leakage.
So to turn a V2, V2P, etc on at 100C at Vccint(abs max) might require a bit more current than at room temp.
That is what that table (specification)is all about.
Aust> "Steven K. Knapp" wrote:
"Hot swap" is probably the magic word to search on if you are browsing vendors web sites. There is a class of chips intended to limit the startup current. I think most of them can be used to solve the ramp up problem.
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John_H, Austin, Uwe, Hal
Thanks for all your anwsers !
Sylvain
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