Spartan 3 DCI

Hi, In Xilinx spartan 3, is it possible to drive both LVDS and SSTL on the same bank with DCI turned on for both IO Standand, i.e SST2_II_DCI and LVDS_25_DCI on the same bank?

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yy
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yy,

SSTL_II_DCI is a 2.5 V Vcco standard (I am assuming it is 2.5V SSTL). So is LVDS_25_DCI a 2.5V Vcco.

That is what is required (same Vcco voltage, for two IO standards to co-exist in the same bank).

Just watch your power dissipation from all those split terminations tied from 2.5V to ground.

Each SSTLII_DCI is 200 ohms across 2.5V. Each LVDS_25_DCI is 100 ohms across 2.5V.

Also make sure you have two 50 ohm resistors connected properly to the reference impedance pins for the bank. Vrn is the nmos reference, tied to Vcco thru the 50 ohms. Vrp is the pmos reference, tied to ground thru its 50 ohms.

Austin

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Austin Lesea

Vrp goes down and Vrn goes up. Vrp goes down and Vrn goes up. Vrp goes down and Vrn goes up....(repeat).

Okay, Vrp goes down and Vrn goes up.

"Did you guys check the Vrp/Vrn resistors?" "Yeah, twice" "Check'm again!" "Why?" "Check'm again" "Ooooops, I got one of'm wrong. I saw the 'N' of the diff pair and thought it was Vrn" "Ya got'm right, now?" "Yep" "Ya sure?" "Nope" "Check'm again"

Bob

Reply to
Bob

Hi Austin, ...but the datasheet tells that there should be no more than one DCI with Split termination on the same bank? i mean what should be the assignment of the pin that is LVDS but in the SSTL_II bank? should it assign it to SSTL_II_DCI instead?

Ayon kay Austin Lesea:

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yy

yy:

I am confused. LVDS_25_DCI is also split termination, one each on the + input, and the - input (two separate split terminations).

Each IOB has its own attribute. The bank is not all of any type of IO.

The SSTL_II_DCI attribute will be one IO pin, and one IOB, and the LVDS_25_DCI attribute will use two IO pins, and one IOB...

Austin

Austin

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Austin Lesea

"The rules guiding the use of DCI standards on banks are as follows:

  1. No more than one DCI I/O standard with a Single Termination is allowed per bank.
  2. No more than one DCI I/O standard with a Split Termination is allowed per bank.
  3. Single Termination, Split Termination, Controlled- Impedance Driver, and Controlled-Impedance Driver with Half Impedance can co-exist in the same bank."

-- Spartan 3 Datasheet

-yy

Ay>

Reply to
yy

I agree,

Those rules ARE confusing.

I will ask tomorrow am at work. But I know from the way the IOB is designed, that the ONLY limitations are the Vcco has to be the same (for all standards in a bank), and the choice of DCI impedance (ie 50 ohms) will mean that all series terminated drivers in the back (eg LVDCI) will be 50 ohms, and all split terminated inputs (or outputs) will also be 50 ohms (100 ohms to Vcco, 100 ohms to ground).

Once the referencve resistors are set in value, then the choices of 1/2,

1, and 2X the reference impedance are fixed in actual value.

Perhaps the rules are implying that you can not have a 50 ohm, and a 68 ohm reference DCI standard in the same bank? This does make sense, as there is only one DCI controller per bank.

Aust> Hi Austin,

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Austin Lesea

Hi Austin, Thanks, I will wait for your information tomorrow then.

--yy

Ayon kay Austin Lesea:

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yy

-yy

Austin,

What did you find out about this? Is LVDS_25_DCI and SSTL2_II_DCI allowed in the same S3 bank?

Thanks, Bob

Reply to
Bob

Bob,

I am still waiting for an official "yes" or "no".

Austin

Reply to
Austin Lesea

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