I think I finally got a grip on the legal connections for the LO output on MUXFx primitive objects, but what are the legal connections for the LO outputs on MUXCY and XORCY primitive objects? Does Xilinx have a document somewhere discussing this? It seems mapper does not automatically swap the O to LO to improve timing. Why is that? It seems that XST and Synplify infer about 90% LO and 10% O. I need to know the rules to make my tool do that. Thanks for your time.
- posted
19 years ago
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