Does anyone know how feasible it is to drive a TFT panel LVDS interface (sometimes called Panel-link I think) direct from the S3 I/Os ? If so, what sort of frequency can you get up to - I saw a mention recently about using the DDR registers to reduce the data rate but couldn't immediately see any Xilinx appnotes when I had a quick look. Also, as the IO banks on the lower-end dev boards tend to be tied to +3.3v, but LVDS needs 2.5v, what happens if you lie to the software about the supply - will it work to any useful degree (interested in lvds output only)?
- posted
18 years ago