Hi All, I'll open a webcase too, but I'm posting in hope of a super quick answer! Here's my question:-
V2P has on-chip differential terminations for LVDS signals, e.g. LVDS_25_DT. See answer #17244. However, although 3.3V banks can support LVDS receivers, the terminated mode is not allowed. I quote:-
"Requirement to Turn on the On-chip Input Differential Termination The VCCO of the I/O bank must be connected to 2.5V to provide 100 ohms of effective termination. NOTE: Starting ISE 6.1i, this requirement is implemented in the software. "
So, this sounds like it's just the new 6.1 software that stops you turning on the termination in 3.3V banks. What happens if you use old software and turn on the termination in a 3.3V bank? Why is it not allowed? Is it just that the termination impedance is different? If so, what is it? It's not hard to change the characteristic impedance of my traces to match a different termination. Is the problem that it's not tested when the parts are produced? My problem is in banks 4 and 5 where a 3.3V 8 bit data bus configures the device. These banks also contain some dedicated clock input pins that I want to use internal terminations on.
Thanks for reading, Syms.