I'm trying to configure a Spartan 3 via Slave Serial mode at power up. I'm storing the configuration file in SPI Flash and using a uP to read the Flash and send the configuration bit stream (and clock) to the FPGA. (I've considered using the FPGA Master Serial mode to clock the SPI Flash, and just using the uP to initiate the flash read instruction, but the hardware is not currently configured that way, so I want to get it working in the Slave Serial mode first on my current hardware.)
I've read Xapp 502 but it still leaves me confused on a couple of points.
- The app note says a .bit file contains header info that should not be downloaded to the FPGA, so I'm trying to use a .bin file. However, I thought the header information allowed the clock rate to be increased in the Master Serial mode. Does the .bin file also include that information? (If I try to use Master Serial mode later.)
- When I serialize the .bin file bytes into a bit stream, do I load the bits from each byte MSB or LSB first into the FPGA?
- When I finish loading the entire .bin file I wait for DONE to go high, and while waiting test if INIT is low (which indicates a CRC error). So far I never get a DONE high or an INIT low. Seems like I should get one or the other? Configuration works fine using Platform Cable USB (JTAG). M0,M1,M2 are configured correctly in Slave Serial mode.
Thanks for answers/suggestions.